Download: 5 V Fast Infrared Transceiver Module Family (FIR, 4 Mbit/s)

5 V Fast Infrared Transceiver Module Family (FIR, 4 Mbit/s)

Description

The TFDU6100, TFDS6500, and TFDT6500 are a smallest FIR transceiver available on the market. family of low–power infrared transceiver modules This wide selection provides flexibility for a variety of compliant to the IrDA 1.2 standard for fast infrared applications and space constraints. The transceivers (FIR) data communication, supporting IrDA speeds are capable of directly interfacing with a wide variety up to 4.0 Mbit/s, HP-SIR, Sharp ASK and carrier of I/O chips which perform the modulation/ based remote control modes up to 2 MHz. Integrated demodulation function, including National within the transceiver modules are a photo PIN diode, Semiconductor’s PC87338, PC87108 and PC87109, infrared emitter (IRED), and a low–power CMOS SMC’s FDC37C669, FDC37N769 and CAM35C44, control IC to provide a total front–end solution in a and Hitachi’s SH3. At a minimum, a current–limiting single package. Vishay Telefunken’s FIR resistor in series with the infrared emitter and a VCC transceivers are available in three package options, bypass capacitor are the only external components including our Baby Face package (TFDU6100), the required to implement a complete solution.

Features

Compliant to IrDA 1.2 (Up to 4 Mbit/s), Baby Face (Universal) Package Capable of HP–SIR, Sharp ASK and TV Remote Surface Mount Solderability to Side and Top View Orientation For 4.5 V to 5.5 V Operating Voltage Directly Interfaces with Various Super I/O and Low–Power Consumption (5 mA Supply Current) Controller Devices Power Shutdown Mode (35 A Shutdown Current) Built–In EMI Protection – No External Shielding Necessary Three Surface Mount Package Options – Universal (9.7 × 4.7 × 4.0 mm) Few External Components Required – Side View (13.0 × 5.95 × 5.3 mm) Backward Compatible to all Telefunken SIR and – Top View (13.0 × 7.6 × 5.95 mm) FIR Infrared Transceivers

Applications

Notebook Computers, Desktop PCs, Palmtop Telecommunication Products Computers (Win CE, Palm PC), PDAs (Cellular Phones, Pagers) Digital Still and Video Cameras Internet TV Boxes, Video Conferencing Systems Printers, Fax Machines, Photocopiers, Screen External Infrared Adapters (Dongles) Projectors Medical and Industrial Data Collection Devices

Package Options

TFDU6100 TFDS6500 TFDT6500 Baby Face (Universal) Side View Top View Rev. A2, 08-Sep-98 1 (13),

Ordering Information

Part Number Qty / Reel Description TFDU6100–TR3 1000 pcs Oriented in carrier tape for side view surface mounting TFDU6100–TT3 1000 pcs Oriented in carrier tape for top view surface mounting TFDS6500–TR3 750 pcs TFDT6500–TR3 750 pcs

Functional Block Diagram VCC

Driver Amplifier Comparator Rxd IRED Anode

AGC

SD/Mode Logic Txd IRED Cathode Open Drain Driver GND 14871 Figure 1. Functional Block Diagram

Pin Description

Pin Number Function Description I/O Active “U” and “T” Option “S” Option18IRED Anode IRED anode, to be externally connected to VCC through a current control resistor21IRED Cathode IRED cathode, internally connected to driver transistor37Txd Transmit Data Input I HIGH42Rxd Received Data Output, push–pull O LOW CMOS driver output capable of driving a standard CMOS or TTL load. No external pull–up or pull–down resistor is required (pin is floating when device is in shutdown mode) 5 6 SD/Mode Shutdown/Mode I HIGH63VCC Supply Voltage75NC Do not connect84GND Ground 2 (13) Rev. A2, 08-Sep-98, “U” Option Baby Face (Universal) “S” Option Side View “T” Option Top View IRED Detector IRED Detector 14885 IRED Detector Figure 2. Pinnings

Absolute Maximum Ratings

Reference point Pin GND unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameters Test Conditions Symbol Min. Typ. Max. Unit Supply Voltage Range VCC – 0.56VPower Dissipation See Derating Curve PD 350 mW Junction Temperature TJ 125 °C Ambient Temperature Tamb –25 +85 °C Range (Operating) Storage Temperature Tstg –25 +85 °C Range Soldering Temperature See Recommended Solder 240 °C Profile (see figure 9) Average Output Current IIRED (DC) 130 mA Repetitive Pulsed Output <90 µs, ton <20% IIRED (RP) 600 mA Current IRED Anode Voltage VIREDA – 0.5 VCC+0.5 V Transmitter Data Input VTxd – 0.5 VCC+0.5 V Voltage Receiver Data Output VRxd – 0.5 VCC+0.5 V Voltage Virtual Source Size Method: d 2.5 2.8 mm (1–1/e) encircled energy Maximum Intensity for EN60825, 1997 320 mW/sr Class 1 Operation of IEC825–1 or EN60825–1 (worst case IrDA FIR pulse pattern) Rev. A2, 08-Sep-98 3 (13),

Electrical Characteristics

Tamb = 25C, VCC = 5.0 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameters Test Conditions / Pins Symbol Min. Typ. Max. Unit Transceiver Supply Voltage VCC 4.5 5 5.5 V Dynamic Supply Current SD = Low ICC57mA Receive mode only. In transmit mode, add additional 100 mA (typ) for IRED current. Standby Supply Current SD = VCC –0.5 ISD 35 100 µA Operating Temperature TA –25 +85 °C Range Output Voltage Low IOL = 2.5 mA VOL 0.3 0.5 V Output Voltage High IOH = –2.5 mA VOH VCC–0.5 V Input Voltage Low (Txd) VIL 0 0.8 V Input Voltage High (Txd) VIH 3.5 V Input Voltage Low VIL 0 0.8 V (SD/Mode) Input Voltage High VIH VCC –0.5 V (SD/Mode) Input Leakage Current IL –10 +10 µA Input Capacitance CI 5 pF 4 (13) Rev. A2, 08-Sep-98,

Optoelectronic Characteristics

Tamb = 25C, VCC = 5.0 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameters Test Conditions Symbol Min. Typ. Max. Unit Receiver Minimum Detection 9.6 kbit/s to 115.2 kbit/s, E 25 35 mW/m2e Threshold Irradiance = 850 nm – 900 nm 1.152 Mbit/s to 4 Mbit/s, E 2e 70 80 mW/m = 850 nm – 900 nm Maximum Detection Ee 5 10 kW/m2 Threshold Irradiance Logic LOW Receiver E 2e 4 mW/m Input Irradiance Rise Time of Output 10% to 90%, @2.2 kΩ, 15pF tr (Rxd) 10 40 ns Signal Fall Time of Output 90% to 10%, @2.2 kΩ, 15pF tf (Rxd) 10 40 ns Signal Rxd Pulse Width of Input pulse length 20 µs, 9.6 kbit/s tPW 0.8 20 µs Output Signal, 50% Input pulse length 125 ns, tPW 60 165 ns 4.0 Mbit/s mode Input pulse length 250 ns, tPW 185 290 ns 4.0 Mbit/s mode (double pulse) Jitter, Leading Edge Input Irradiance = 90 mW/m2, 10 ns 4.0 Mbit/s mode Latency tL 120 µs Transmitter IRED Operating R1 = 7.2 Ω, VCC = 5.0 V ID 0.4 0.55 A Current Output Radiant Vcc = 5.0 V, α = 0, 15 Ie 0.04 mW/sr Intensity Txd = Low or SD = High (Receiver is inactive as long as SD = High) R1 = 7.2 Ω Vcc = 5.0 V, α = 0, 15 Ie 100 140 320 mW/sr Txd = High, SD = Low, R1 = 7.2 Ω Radiant Intensity, 1/2 ±24 Half – Intensity Angle Peak – Emission P 880 900 nm Wavelength Optical Rise Time, tropt, 10 40 ns Fall Time tfopt Optical Overshoot 25 % Rev. A2, 08-Sep-98 5 (13),

Recommended Circuit Diagram

The only required component for designing an R2, C1 and C2 are optional and dependent on the IrDA 1.2 compatible design using Telefunken FIR quality of the supply voltage VCC and injected noise. transceivers is a current limiting resistor, R1, to the An unstable power supply with dropping voltage IRED. However, depending on the entire system during transmission may reduce sensitivity (and design and board layout, additional components may transmission range) of the transceiver. be required (see figure 3). VCC 500 5.25V max. intensity in R1 5.0V emission cone 15°TFDx6x00 400 min. Rdson, min. VF IRED IRED R2 Cathode Anode Rxd Rxd Txd VCC SD/Mode Txd C1 C2 200 5.0V GND NC max.Rdson, max.VGND F100 Vcc=4.75V SD/Mode min. intensity in emission cone 15°0 Note: Outlined components are optional depending0246810 12 14 16 on the quality of the power supply. 14872 14379 Current Control Resistor ( ) Figure 3. Recommended Application Circuit Figure 4. Intesity Ie vs. Current Control Resistor R1 Telefunken FIR transceivers integrate a sensitive The placement of these parts is critical. It is strongly receiver and a built–in power driver. The combination recommended to position C2 as near as possible to of both needs a careful circuit board layout. The use the transceiver power supply pins. A tantalum capac- of thin, long resistive and inductive wiring should be itor should be used for C1 while a ceramic capacitor avoided. The inputs (Txd, SD/Mode) and the output is used for C2. Also, when connecting the described Rxd should be directly (DC) coupled to the I/O circuit. circuit to the power supply, low impedance wiring R1 is used for controlling the current through the IR should be used. emitter. For increasing the output power of the IRED, the value of the resistor should be reduced. Similarly, Table 1. Recommended Application Circuit Components to reduce the output power of the IRED, the value of Component Recommended Value the resistor should be increased. For typical values of R1 see figure 4. For IrDA compliant operation, a C1 4.7 F, Tantalum current control resistor of 7.2 Ω is recommended. C2 0.1 µF, Ceramic The upper drive current limitation is dependent on the R1 7.2 Ω , 0.25 W (recommend using two duty cycle and is given by the absolute maximum 3.6 , 0.125 W resistors in series) ratings on the data sheet. R2 47 Ω , 0.125W6(13) Rev. A2, 08-Sep-98 Intensity (mW/sr),

Mode Switching

The TFDU6100, TFDS6500 and TFDT6500 powers Setting to the High Bandwidth Mode on with a default of low frequency mode. (0.576 Mbit/s to 4.0 Mbit/s) 1. Set SD/MODE input to logic “HIGH”. The low frequency mode covers speeds up to 115.2 kbit/s. Signals with higher data rates should be 2. Set Txd input to logic “HIGH”. Wait ts ≥ 200 ns. detected in the high frequency mode. Lower frequency data can also be received in the high 3. Set SD/MODE to logic “LOW” (this negative edge frequency mode but with reduced sensitivity. To latches state of Txd, which determines speed switch the transceivers from low frequency mode to setting). the 4.0 Mbit/s mode and vice versa, the program- 4. After waiting th ≥ 200 ns Txd can be set to logic ming sequences described below are required. “LOW”. The hold time of Txd is limited by the maximum allowed pulse length. Txd is now enabled as normal Txd input for the high bandwidth mode. SD/Mode 50%

Setting to the Lower Bandwidth Mode

(2.4 kbit/s to 115.2 kbit/s) ts th High : FIR 1. Set SD/MODE input to logic “HIGH”. Txd 50% 50% 2. Set Txd input to logic “LOW”. Wait ts ≥ 200 ns. Low : SIR 3. Set SD/MODE to logic “LOW” (this negative edge latches state of Txd, which determines speed 14873 setting). 4. Txd must be held for th ≥ 200 ns. Txd is now enabled as normal Txd input for the lower Figure 5. Mode Switching Timing Diagram bandwidth mode. Rev. A2, 08-Sep-98 7 (13),

Recommended SMD Pad Layout

The leads of the device should be soldered in the center position of the pads. 7x1= 7 0.6 2.518Figure 6. TFDU6100 BabyFace (Universal) 11.8 5.1 2.5 2.587651.8 0.63 1.1 1.0 8.30.6 1 2.212342.5 2.5 5.08 Figure 7. TFDS6500 Side View Package 8.89 1.27 0.8 1.818Figure 8. TFDT6500 Top View Package Note: Leads of the device should be at least 0.3 mm within the ends of the pads. Pad 1 is longer to designate Pin 1 connection to transceiver. 8 (13) Rev. A2, 08-Sep-98,

Recommended Solder Profile Current Derating Diagram

240 10 s max. @ 210 230°C 500 2 - 4°C/s 120 300 120 - 180 s 90 s max. 90 200 Current derating as a function of the maximum forward current of IRED. 60 2 - 4°C/s Maximum duty cycle: 25%. 00050 100 150 200 250 300 350 –40 –20 0 20 40 60 80 100 120 140 14874 Time ( s ) 14875 Temperature ( °C ) Figure 9. Recommended Solder Profile Figure 10. Current Derating Diagram Rev. A2, 08-Sep-98 9 (13) Temperature ( ° C ) Peak Operating Current ( mA ), TFDU6100 – Baby Face (Universal) Package (Mechanical Dimensions) Issue: 8; 10.7.98 10 (13) Rev. A2, 08-Sep-98, TFDS6500 – Side View Package (Mechanical Dimensions) Rev. A2, 08-Sep-98 11 (13), TFDT6500 – Top View Package (Mechanical Dimensions) 12 (13) Rev. A2, 08-Sep-98,

Ozone Depleting Substances Policy Statement

It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Telefunken products for any unintended or unauthorized application, the buyer shall indemnify Vishay Telefunken against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423 Rev. A2, 08-Sep-98 13 (13)]

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