Download: DATA SHEET BSS92 P-channel enhancement mode vertical D-MOS transistor

DISCRETE SEMICONDUCTORS DATA SHEET BSS92 P-channel enhancement mode vertical D-MOS transistor Product specification 1997 Jun 19 Supersedes data of April 1995 File under Discrete Semiconductors, SC13b FEATURES PINNING - TO-92 (SOT54) variant • Direct interface to C-MOS, TTL, etc. PIN SYMBOL DESCRIPTION • High-speed switching1ggate • No secondary breakdown. 2 d drain3ssource APPLICATIONS • Line current interrupter in telephony applications • Relay, high speed and line transformer drivers. handbook, halfpage d DESCRIPTION3gP-channel enhancement mode vertical D-MOS transistor in a TO-92 (SOT54) va...
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DISCRETE SEMICONDUCTORS

DATA SHEET BSS92 P-channel enhancement mode

vertical D-MOS transistor Product specification 1997 Jun 19 Supersedes data of April 1995 File under Discrete Semiconductors, SC13b, FEATURES PINNING - TO-92 (SOT54) variant • Direct interface to C-MOS, TTL, etc. PIN SYMBOL DESCRIPTION • High-speed switching1ggate • No secondary breakdown. 2 d drain3ssource

APPLICATIONS

• Line current interrupter in telephony applications • Relay, high speed and line transformer drivers. handbook, halfpage d DESCRIPTION3gP-channel enhancement mode vertical D-MOS transistor in a TO-92 (SOT54) variant package. MAM144 s Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VDS drain-source voltage (DC) − − −240 V VGSO gate-source voltage (DC) open drain − − ±20 V ID drain current (DC) − − −150 mA RDSon drain-source on-state resistance ID = −100 mA; VGS = −10 V − 10 20 Ω Ptot total power dissipation Tamb ≤ 25 °C − − 1 W yfs forward transfer admittance VDS = −25 V; ID = −100 mA 60 200 − mS 1997 Jun 19 2, LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage (DC) − −240 V VGSO gate-source voltage (DC) open drain − ±20 V ID drain current (DC) − −150 mA IDM peak drain current − −600 mA Ptot total power dissipation Tamb ≤ 25 °C; note 1 − 1 W Tstg storage temperature −55 +150 °C Tj operating junction temperature − 150 °C THERMAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS VALUE UNIT Rth j-a thermal resistance from junction to ambient note 1 125 K/W Note to the Limiting values and Thermal characteristics 1. Device mounted on a printed-circuit board, maximum lead length 4 mm; mounting pad for drain lead minimum 10 mm × 10 mm.

CHARACTERISTICS

Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(BR)DSS drain-source breakdown voltage VGS = 0; ID = −250 µA −240 − − V VGSth gate-source threshold voltage VDS = VGS; ID = −1 mA −0.8 − −2.8 V IDSS drain-source leakage current VGS = 0; VDS = −60 V − − −200 nA VGS = 0; VDS = −200 V − − −60 µA IGSS gate leakage current VDS = 0; VGS = ±20 V − − ±100 nA RDSon drain-source on-state resistance VGS = −10 V; ID = −100 mA − 10 20 Ω yfs forward transfer admittance VDS = −25 V; ID = −100 mA 60 200 − mS Ciss input capacitance VGS = 0; VDS = −25 V; f = 1 MHz − 65 − pF Coss output capacitance VGS = 0; VDS = −25 V; f = 1 MHz − 20 − pF Crss reverse transfer capacitance VGS = 0; VDS = −25 V; f = 1 MHz − 6 − pF Switching times (see Figs 2 and 3) ton turn-on time VGS = 0 to −10 V; VDD = −50 V; − 5 − ns ID = −250 mA toff turn-off time VGS = −10 to 0 V; VDD = −50 V; − 20 − ns ID = −250 mA 1997 Jun 19 3, handbook, halfpage 10 % handbook, halfpage VD D = −50 V

INPUT

90 % I 10 %D

OUTPUT

−10 V 50 Ω 90 % MBB689 t on t off MBB690 Fig.2 Switching times test circuit. Fig.3 Input and output waveforms. 1997 Jun 19 4, PACKAGE OUTLINE Plastic single-ended leaded (through hole) package; 3 leads (on-circle) SOT54 variant c L2

E

dALb2e1Deb1 L1 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) (1) L UNIT LA b b1cDdEee1L12max max 5.2 0.48 0.66 0.45 4.8 1.7 4.2 14.5 mm 5.0 0.40 0.56 0.40 4.4 1.4 3.6 2.54 1.27 12.7 2.5 2.5 Notes 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE REFERENCES EUROPEAN PROJECTION ISSUE DATEVERSION IEC JEDEC EIAJ SOT54 variant TO-92 SC-43 97-04-14 1997 Jun 19 5,

DEFINITIONS

Data Sheet Status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 1997 Jun 19 6,

P-channel enhancement mode vertical D-MOS transistor NOTES

1997 Jun 19 7,

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