Download: ON Semiconductor High Voltage Transistor BSS63LT1 PNP Silicon

ON Semiconductor High Voltage Transistor BSS63LT1 PNP Silicon MAXIMUM RATINGS Rating Symbol Value Unit Collector–Emitter Voltage VCEO –100 Vdc Collector–Emitter Voltage VCER Vdc RBE = 10 kΩ –110 1 Collector Current — Continuous IC –100 mAdc 2 THERMAL CHARACTERISTICS CASE 318–08, STYLE 6 Characteristic Symbol Max Unit SOT–23 (TO–236AB) Total Device Dissipation FR–5 Board(1) PD 225 mW TA = 25°C Derate above 25°C 1.8 mW/°C Thermal Resistance Junction to Ambient RJA 556 °C/W Total Device Dissipation PD 300 mW COLLECTOR Alumina Substrate,(2) TA = 25°C 3 Derate above 25°C 2.4 mW/°C Thermal Resistanc...
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ON Semiconductor High Voltage Transistor BSS63LT1 PNP Silicon

MAXIMUM RATINGS Rating Symbol Value Unit Collector–Emitter Voltage VCEO –100 Vdc Collector–Emitter Voltage VCER Vdc RBE = 10 kΩ –110 1 Collector Current — Continuous IC –100 mAdc 2 THERMAL CHARACTERISTICS CASE 318–08, STYLE 6 Characteristic Symbol Max Unit SOT–23 (TO–236AB) Total Device Dissipation FR–5 Board(1) PD 225 mW TA = 25°C Derate above 25°C 1.8 mW/°C Thermal Resistance Junction to Ambient RJA 556 °C/W Total Device Dissipation PD 300 mW COLLECTOR Alumina Substrate,(2) TA = 25°C 3 Derate above 25°C 2.4 mW/°C Thermal Resistance, Junction to Ambient RJA 417 °C/W 1 Junction and Storage Temperature TJ, Tstg –55 to +150 °C BASE DEVICE MARKING BSS63LT1 = T1

EMITTER

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Collector–Emitter Breakdown Voltage V(BR)CEO Vdc (IC = –100 µAdc) –100 — — Collector–Emitter Breakdown Voltage V(BR)CER Vdc (IC = –10 µAdc, IE = 0, RBE = 10 kΩ) –110 — — Collector–Base Breakdown Voltage V(BR)CBO Vdc (IE = –10 Adc, IE = 0) –110 — — Emitter–Base Breakdown Voltage V(BR)EBO Vdc (IE = –10 Adc) –6.0 — — Collector Cutoff Current ICBO nAdc (VCB = –90 Vdc, IE = 0) — — –100 Collector Cutoff Current ICER µAdc (VCE = –110 Vdc, RBE = 10 kΩ) — — –10 Emitter Cutoff Current IEBO nAdc (VEB = –6.0 Vdc, IC = 0) — — –200 1. FR–5 = 1.0 0.75 0.062 in. 2. Alumina = 0.4 0.3 0.024 in. 99.5% alumina. Semiconductor Components Industries, LLC, 2001 1 Publication Order Number: November, 2001 – Rev. 3 BSS63LT1/D, ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued) Characteristic Symbol Min Typ Max Unit ON CHARACTERISTICS DC Current Gain hFE — (IC = –10 mAdc, VCE = –1.0 Vdc) 30 — — (IC = –25 mAdc, VCE = –1.0 Vdc) 30 — — Collector–Emitter Saturation Voltage VCE(sat) mVdc (IC = –25 mAdc, IB = –2.5 mAdc) — — –250 Base–Emitter Saturation Voltage VBE(sat) mVdc (IC = –25 mAdc, IB = –2.5 mAdc) — — –900 SMALL–SIGNAL CHARACTERISTICS Current–Gain — Bandwidth Product fT MHz (IC = –25 mAdc, VCE = –5.0 Vdc, f = 20 MHz) 50 95 — Case Capacitance CC pF (IE = IC = 0, VCB = –10 Vdc, f = 1.0 MHz) — — 20,

INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE

MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the interface between the board and the package. With the total design. The footprint for the semiconductor packages correct pad geometry, the packages will self align when must be the correct size to insure proper solder connection subjected to a solder reflow process. 0.037 0.037 0.95 0.95 0.079 2.0 0.035 0.9 0.031 inches 0.8 mm SOT–23 SOT–23 POWER DISSIPATION The power dissipation of the SOT–23 is a function of the SOLDERING PRECAUTIONS pad size. This can vary from the minimum pad size for The melting temperature of solder is higher than the soldering to a pad size given for maximum power dissipa- rated temperature of the device. When the entire device is tion. Power dissipation for a surface mount device is deter- heated to a high temperature, failure to complete soldering mined by TJ(max), the maximum rated junction temperature within a short time could result in device failure. There- of the die, RθJA, the thermal resistance from the device fore, the following items should always be observed in junction to ambient, and the operating temperature, TA. order to minimize the thermal stress to which the devices Using the values provided on the data sheet for the SOT–23 are subjected. package, PD can be calculated as follows: • Always preheat the device. TJ(max) – TA • The delta temperature between the preheat and PD = RθJA soldering should be 100°C or less.* • When preheating and soldering, the temperature of the The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values leads and the case must not exceed the maximum into the equation for an ambient temperature T of 25°C, temperature ratings as shown on the data sheet. WhenA one can calculate the power dissipation of the device which using infrared heating with the reflow soldering in this case is 225 milliwatts. method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed PD = 150°C – 25°C = 225 milliwatts 260°C for more than 10 seconds. 556°C/W • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. The 556°C/W for the SOT–23 package assumes the use • After soldering has been completed, the device should of the recommended footprint on a glass epoxy printed be allowed to cool naturally for at least three minutes. circuit board to achieve a power dissipation of 225 milli- Gradual cooling should be used as the use of forced watts. There are other alternatives to achieving higher cooling will increase the temperature gradient and power dissipation from the SOT–23 package. Another result in latent failure due to mechanical stress. alternative would be to use a ceramic substrate or an • Mechanical stress or shock should not be applied aluminum core board such as Thermal Clad. Using a during cooling. board material such as Thermal Clad, an aluminum core * Soldering a device without preheating can cause exces- board, the power dissipation can be doubled using the same sive thermal shock and stress which can result in damage footprint. to the device.,

PACKAGE DIMENSIONS CASE 318–08 ISSUE AE SOT–23 (TO–236AB)

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH.

A 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD L FINISH THICKNESS. MINIMUM LEAD THICKNESS

IS THE MINIMUM THICKNESS OF BASE MATERIAL. INCHES MILLIMETERS

B S DIM MIN MAX MIN MAX

12A0.1102 0.1197 2.80 3.04 B 0.0472 0.0551 1.20 1.40 C 0.0350 0.0440 0.89 1.11

VGD0.0150 0.0200 0.37 0.50

G 0.0701 0.0807 1.78 2.04 H 0.0005 0.0040 0.013 0.100 J 0.0034 0.0070 0.085 0.177

C

K 0.0140 0.0285 0.35 0.69 L 0.0350 0.0401 0.89 1.02

HJS0.0830 0.1039 2.10 2.64DKV0.0177 0.0236 0.45 0.60 Thermal Clad is a trademark of the Bergquist Company.

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION

Literature Fulfillment: JAPAN: ON Semiconductor, Japan Customer Focus Center Literature Distribution Center for ON Semiconductor 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 P.O. Box 5163, Denver, Colorado 80217 USA Phone: 81–3–5740–2700 Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Email: email is hidden Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: email is hidden ON Semiconductor Website: http://onsemi.com For additional information, please contact your local N. American Technical Support: 800–282–9855 Toll Free USA/Canada Sales Representative. http://onsemi.com BSS63LT1/D]
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