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DESCRIPTION QUICK REFERENCE DATA Monolithic overload protected logic SYMBOL PARAMETER MAX. UNIT level power MOSFET in a surface mount plastic envelope, intended as VDS Continuous drain source voltage 50Vageneral purpose switch for automotive systems and other ID Continuous drain current 0.5 A applications. PD Total power dissipation 1.8 W APPLICATIONS Tj Continuous junction temperature 150 ˚C General controller for driving lamps RDS(ON) Drain-source on-state resistance 200 mΩ small motors solenoids FEATURES FUNCTIONAL BLOCK DIAGRAM Vertical power DMOS output stage DRAIN Overload protection by ...
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DESCRIPTION QUICK REFERENCE DATA

Monolithic overload protected logic SYMBOL PARAMETER MAX. UNIT level power MOSFET in a surface mount plastic envelope, intended as VDS Continuous drain source voltage 50Vageneral purpose switch for automotive systems and other ID Continuous drain current 0.5 A applications. PD Total power dissipation 1.8 W

APPLICATIONS

Tj Continuous junction temperature 150 ˚C General controller for driving lamps RDS(ON) Drain-source on-state resistance 200 mΩ small motors solenoids

FEATURES FUNCTIONAL BLOCK DIAGRAM

Vertical power DMOS output stage DRAIN Overload protection by current limiting and overtemperature sensing Latched overload protection O/V reset by input5Vlogic compatible input level CLAMP Control of power MOSFET POWERINPUT and supply of overload RIG MOSFET protection circuits derived from input Low operating input current permits direct drive by LOGIC AND micro-controller PROTECTION ESD protection on all pins Overvoltage clamping for turn off of inductive loads

SOURCE

Fig.1. Elements of the TOPFET.

PINNING - SOT223 PIN CONFIGURATION SYMBOL

PIN DESCRIPTION4D1input TOPFET 2 drain I

P

3 source 4 drain (tab) 123SSeptember 1994 1 Rev 1.000,

LIMITING VALUES

Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS Continuous drain source voltage 1 - - 50 V ID Continuous drain current 2 - - self limiting A II Continuous input current clamping - 3 mA IIRM Non-repetitive peak input current tp ≤ 1 ms - 10 mA PD Total power dissipation Tamb = 25 ˚C - 1.8 W Tstg Storage temperature - -55 150 ˚C Tj Continuous junction temperature normal operation 3 - 150 ˚C

ESD LIMITING VALUE

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VC Electrostatic discharge capacitor Human body model; - 2 kV voltage C = 250 pF; R = 1.5 kΩ

OVERVOLTAGE CLAMPING LIMITING VALUES

At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT EDSM Non-repetitive clamping energy Tb ≤ 25 ˚C; IDM < ID(lim); - 100 mJ inductive load EDRM Repetitive clamping energy Tb ≤ 75 ˚C; IDM = 50 mA; - 4 mJ f = 250 Hz

OVERLOAD PROTECTION LIMITING VALUES

With the protection supply provided via the input pin, TOPFET can protect itself from short circuit loads. Overload protection operates by means of drain current limiting and activating the overtemperature protection. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VISP Protection supply voltage 4 for valid protection 4 - V VDDP Protected drain source supply voltage VIS = 5 V - 35 V

OVERLOAD PROTECTION CHARACTERISTICS

TOPFET switches off to protect itself when there is an overload fault condition. It remains latched off until reset by the input. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Overload protection ID(lim) Drain current limiting VIS = 5 V 0.5 1 1.5 A Overtemperature protection only in drain current limiting Tj(TO) Threshold junction temperature VIS = 5 V 100 130 160 ˚C 1 Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy. 2 Refer to OVERLOAD PROTECTION CHARACTERISTICS. 3 Not in an overload condition with drain current limiting. 4 The input voltage for which the overload protection circuits are functional. September 1994 2 Rev 1.000,

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Thermal resistance Rth j-b Junction to board 1 Mounted on any PCB - 40 - K/W Rth j-a Junction to ambient Mounted on PCB of fig. 19 - - 70 K/W

STATIC CHARACTERISTICS

Tb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT V(CL)DSS Drain-source clamping voltage VIS = 0 V; ID = 10 mA 50 55 - V V(CL)DSS Drain-source clamping voltage VIS = 0 V; IDM = 200 mA; - 56 70 V tp ≤ 300 µs; δ ≤ 0.01 IDSS Off-state drain current VDS = 45 V; VIS = 0 V - 0.5 2 µA IDSS Off-state drain current VDS = 50 V; VIS = 0 V - 1 20 µA IDSS Off-state drain current VDS = 40 V; VIS = 0 V; Tj = 100 ˚C - 10 100 µA RDS(ON) Drain-source on-state VIS = 5 V; IDM = 100 mA; - 150 200 mΩ resistance2 tp ≤ 300 µs; δ ≤ 0.01

INPUT CHARACTERISTICS

Tb = 25 ˚C unless otherwise specified. The supply for the logic and overload protection is taken from the input. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT VIS(TO) Input threshold voltage VDS = 5 V; ID = 1 mA 1.7 2.2 2.7 V IIS Input supply current normal operation; VIS = 5 V - 330 450 µA VIS = 4 V - 170 270 µA IISL Input supply current protection latched; VIS = 5 V - 500 650 µA VIS = 3.5 V - 250 400 µA VISR Protection latch reset voltage312.2 3.5 V V(CL)IS Input clamping voltage II = 1.5 mA 6 7.5 - V RIG Input series resistance to gate of power MOSFET - 33 - kΩ

SWITCHING CHARACTERISTICS

Tamb = 25 ˚C; resistive load RL = 50 Ω; adjust VDD to obtain ID = 250 mA; refer to test circuit and waveforms SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT td on Turn-on delay time VIS = 0 V to VIS = 5 V - 8 - µs tr Rise time - 30 - µs td off Turn-off delay time VIS = 5 V to VIS = 0 V - 3 - µs tf Fall time - 6 - µs 1 Temperature measured 1.3 mm from tab. 2 Continuous input voltage. The specified pulse width is for the drain current. 3 The input voltage below which the overload protection circuits will be reset. September 1994 3 Rev 1.000, 120 PD% Normalised Power Derating a Normalised RDS(ON) = f(Tj) 100 1.5 1.0 30 0.500020 40 60 80 100 120 140 -60 -40 -20 0 20 40 60 80 100 120 140 Tmb / C Tj / C

Fig.2. Normalised limiting power dissipation. Fig.5. Normalised drain-source on-state resistance. PD% = 100⋅PD/PD(25 ˚C) = f(Tmb) a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 100 mA; VIS = 5 V

ID / A BUK107-50DL RDS(ON) / mOhm BUK107-50DL 2.0 CURRENT LIMITING OCCURS 240 WITHIN THE SHADED REGION MAX. 1.5 200 TYP. 1.0 TYP. 120 0.500020 40 60 80 100 120 1400246810 Tamb / C VIS / V

Fig.3. Continuous drain current. Fig.6. Typical on-state resistance, Tj = 25 ˚C. ID = f(Tamb); condition: VIS = 5 V RDS(ON) = f(VIS); conditions: ID = 100 mA, tp = 300 µs

ID / A BUK107-50DL ID / A BUK107-50DL 1.5 1.5 VIS / V = 71510.5 0.50004812 16 20 24 28 320246810 VDS / V VIS / V

Fig.4. Typical on-state characteristics, Tj = 25 ˚C. Fig.7. Typical transfer characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VIS; tp = 300 µs ID = f(VIS); conditions: VDS = 10 V, tp = 300 µs September 1994 4 Rev 1.000

, Tj(TO) / C BUK107-50DL VIS(TO) / V BUK107-50DL 160 MAX. 140 TYP. TYP. 2 MIN. 0246810 -50 0 50 100 150 VIS / V Tj / C

Fig.8. Typical overtemperature protection threshold. Fig.11. Input threshold voltage. Tj(TO) = f(VIS); condition: VDS = 10 V VIS(TO) = f(Tj); conditions: ID = 1 mA; VDS = 5 V

IIS & IISL / mA BUK107-50DL II / mA BUK107-50DL 1.0 10 0.9 9 0.8 8 0.7 LATCHED 7 0.6 6 0.5 5 0.4 NORMAL 4

IISL

0.3 RESET 3

IIS

0.2 2 0.1100024680246810 VIS / V VIS / V

Fig.9. Typical DC input characteristics, Tj = 25 ˚C. Fig.12. Typical input clamping characteristic. IIS & IISL = f(VIS); normal operation & protection latched II = f(VIS); normal operation, Tj = 25 ˚C.

IIS / uA BUK107-50DL ID / mA BUK107-50DL 500 200 VIS / V = 5 V TYP. 4V00-50 0 50 100 150 50 52 54 56 58 60 Tj / C VDS / V

Fig.10. Typical DC input current. Fig.13. Overvoltage clamping characteristic, 25 ˚C. IIS = f(Tj); parameter VIS; normal operation ID = f(VDS); conditions: VIS = 0 V; tp ≤ 300 µs September 1994 5 Rev 1.000

, VDD IDSS BUK107-50DL10 uA

RL

1 uA

VDS

D measure

TOPFET

100 nA

I

P D.U.T. VIS S 10 nA -50 0 50 100 150 0V Tj / C Fig.14. Test circuit for resistive load switching times. Fig.16. Typical drain source leakage current VIS = 5 V IDSS = f(Tj); conditions: VDS = 40 V; VIS = 0 V. VIS & VDS / V BUK107-50DL

VDS VIS

-20 0 20 40 60 80 100 120 140 160 180 time / us Fig.15. Typical switching waveforms, resistive load . RL = 50 Ω; adjust VDD to obtain ID = 250 mA; Tj = 25˚C Zth j-amb / (K/W) BUK107-50DL 1E+02 D = 0.5 0.2 1E+01 0.1 0.05 0.02 1E+00 P tp tpD D = T 1E-01Tt1E-02 1E-07 1E-05 1E-03 1E-01 1E+01 1E+03 t / s Fig.17. Transient thermal impedance, TOPFET mounted on PCB of fig 19. Zth j-amb = f(t); parameter D = tp/T September 1994 6 Rev 1.000,

MOUNTING INSTRUCTIONS PRINTED CIRCUIT BOARD

Dimensions in mm. Dimensions in mm. 3.8 36 min 1.5 min 18 4.6 4.5 2.3 6.3 1.5 min (3x) 1.5 min 4.6 7 Fig.18. Soldering pattern for surface mounting. Fig.19. PCB for thermal resistance and power rating. PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35 µm thick). September 1994 7 Rev 1.000,

MECHANICAL DATA

Dimensions in mm 6.7 6.3 Net Mass: 0.11gB0.32 3.1 0.24 2.9 0.2MA4A0.10 0.02 3.7 7.3 3.3 6.7 16 13 max123max 1.8 1.05 2.3 0.80 max 0.1 M B0.85 0.60 (4x) 4.6 Fig.20. SOT223 surface mounting package1. 1 For further information, refer to surface mounting instructions for SOT223 envelope. September 1994 8 Rev 1.000,

DEFINITIONS

Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1995 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. September 1994 9 Rev 1.000]
15

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