Download: Order this document SEMICONDUCTOR TECHNICAL DATA by MRF157/D The RF Power MOS Line N–Channel Enhancement Mode

Order this document SEMICONDUCTOR TECHNICAL DATA by MRF157/D The RF Power MOS Line N–Channel Enhancement Mode Designed primarily for linear large–signal output stages to 80 MHz. • Specified 50 Volts, 30 MHz Characteristics Output Power = 600 Watts Power Gain = 21 dB (Typ) Efficiency = 45% (Typ) 600 W, to 80 MHz MOS LINEAR RF POWER FETDGSCASE 368–03, STYLE 2 MAXIMUM RATINGS Rating Symbol Value Unit Drain–Source Voltage VDSS 125 Vdc Drain–Gate Voltage VDGO 125 Vdc Gate–Source Voltage VGS ±40 Vdc Drain Current — Continuous ID 60 Adc Total Device Dissipation @ TC = 25°C PD 1350 Watts Derate above ...
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Order this document SEMICONDUCTOR TECHNICAL DATA by MRF157/D The RF Power MOS Line N–Channel Enhancement Mode

Designed primarily for linear large–signal output stages to 80 MHz. • Specified 50 Volts, 30 MHz Characteristics Output Power = 600 Watts Power Gain = 21 dB (Typ) Efficiency = 45% (Typ) 600 W, to 80 MHz MOS LINEAR RF POWER FET

D G S

CASE 368–03, STYLE 2 MAXIMUM RATINGS Rating Symbol Value Unit Drain–Source Voltage VDSS 125 Vdc Drain–Gate Voltage VDGO 125 Vdc Gate–Source Voltage VGS ±40 Vdc Drain Current — Continuous ID 60 Adc Total Device Dissipation @ TC = 25°C PD 1350 Watts Derate above 25°C 7.7 W/°C Storage Temperature Range Tstg –65 to +150 °C Operating Junction Temperature TJ 200 °C THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction to Case RθJC 0.13 °C/W NOTE — CAUTION — MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. REV1MMOotoTrOolaR, OIncL. A19 R95F DEVICE DATA MRF157, ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Drain–Source Breakdown Voltage (VGS = 0, ID = 100 mA) V(BR)DSS 125 — — Vdc Zero Gate Voltage Drain Current (VDS = 50 V, VGS = 0) IDSS — — 20 mAdc Gate–Body Leakage Current (VGS = 20 V, VDS = 0) IGSS — — 5.0 µAdc ON CHARACTERISTICS Gate Threshold Voltage (VDS = 10 V, ID = 100 mA) VGS(th) 1.0 3.0 5.0 Vdc Drain–Source On–Voltage (VGS = 10 V, ID = 40 A) VDS(on) 1.0 3.0 5.0 Vdc Forward Transconductance (VDS = 10 V, ID = 20 A) gfs 16 24 — mhos DYNAMIC CHARACTERISTICS Input Capacitance Ciss — 1800 — pF (VDS = 50 V, VGS = 0 V, f = 1.0 MHz) Output Capacitance Coss — 750 — pF (VDS = 50 V, VGS = 0, f = 1.0 MHz) Reverse Transfer Capacitance Crss — 75 — pF (VDS = 50 V, VGS = 0, f = 1.0 MHz) FUNCTIONAL TESTS Common Source Amplifier Power Gain Gps 15 21 — dB (VDD = 50 V, Pout = 600 W, IDQ = 800 mA, f = 30 MHz) Drain Efficiency h 40 45 — % (VDD = 50 V, Pout = 600 W, f = 30 MHz, IDQ = 800 mA) Intermodulation Distortion IMD(d3) — –25 — dB (VDD = 50 V, Pout = 600 W(PEP), f1 = 30 MHz, f2 = 30.001 MHz, IDQ = 800 mA) C20 C21 + + 0–6 V + – R1 C5 C6 L2 L3 50 V C15 C16 C17 C18 – D.U.T. R2 C14 C19 C4 L1 C7RF C10 C11 C12 C13 INPUT C3 C9 C1 C2

RF

T1 OUTPUT C1, C3, C8 — Arco 469 C8 C2 — 330 pF C4 — 680 pF C5, C19, C20 — 0.47 µF, RMC Type 2225C C6, C7, C14, C15, C16 — 0.1 µF C9, C10, C11 — 470 pF C12 — 1000 pF C13 — Two Unencapsulated 1000 pF Mica, in Series R1, R2 — 10 Ohms/2W Carbon C17, C18 — 0.039 µF T1 — RF Transformer, 1:25 Impedance Ratio. See Motorola C21 — 10 µF/100 V Electrolytic T1 — Application Note AN749, Figure 4 for details. L1 — 2 Turns #16 AWG, 1/2″ ID, 3/8″ Long T1 — Ferrite Material: 2 Each, Fair–Rite Products L2, L3 — Ferrite Beads, Fair–Rite Products Corp. #2673000801 T1 — Corp. #2667540001 All capacitors ATC type 100/200 chips or equivalent unless otherwise noted. Figure 1. 30 MHz Test Circuit MRF157 MOTOROLA RF DEVICE DATA, 30 800 VDS = 50 V 25 40V04812 16 IDQ = 800 mA

V

10 DD = 50 V VDS = 50 V IDQ = 800 mA 600 Pout = 600 W 400 5 40V0012510 20 50 100 0 40 80 f, FREQUENCY (MHz) Pin, INPUT POWER (WATTS)

Figure 2. Power Gain versus Frequency Figure 3. Output Power versus Input Power

100 5000 Ciss TC = 25°C 2000 Coss 10 500 VGS = 0 V Crss 100 f = 1 MHz 1 50 2 20 20012510 20 50 100 V , DRAIN–SOURCE VOLTAGE (VOLTS) VDS, DRAIN–SOURCE VOLTAGE (VOLTS)DS

Figure 4. DC Safe Operating Area Figure 5. Capacitance versus Drain Voltage

40 1.04 1.03 ID = 20 A1.02 TYPICAL DEVICE SHOWN 1.01 30 VDS = 10V116 A VGS(th) = 3.5 V 0.99 gfs = 24 mhos 0.98 20 0.978A0.96 0.95 0.944A0.93 0.92 0.91 0.4A1A00.902468–25 0 25 50 75 100 VGS, GATE–SOURCE VOLTAGE (VOLTS) TC, CASE TEMPERATURE (°C)

Figure 6. Gate Voltage versus Drain Current Figure 7. Gate–Source Voltage versus Case Temperature MOTOROLA RF DEVICE DATA MRF157

IDS, DRAIN CURRENT (AMPS) I D , DRAIN CURRENT (AMPS) POWER GAIN (dB) VG S , GATE–SOURCE VOLTAGE (NORMALIZED) C, CAPACITANCE (pF) Pout, OUTPUT POWER (WATTS) 80 MHz 30 MHz, 4 1 VDD = 60VD= 0.5 IDQ = 2 x 800 mA 0.5 f = 30 MHz t1 = 1 ms (See Fig. 9) 0.2 R (t) = r(t) R t2 = 10 ms (See Fig. 9) 0.2 θJC θJC RθJC = 0.13°C/W MAX 0.1 D CURVES APPLY FOR POWER 2 PULSE TRAIN SHOWN0.1 READ TIME AT t1 0.05 TJ(pk) – TC = P(pk) RθJC(t) 0.05 1 0.02 P(pk) t1 0.02 t2 SINGLE PULSE DUTY CYCLE, D = t1/t2 0 0.01 0 20 40 60 80 100 10–2 10–1 1 10 102 103 104 Pin, POWER INPUT (WATTS) PULSE WIDTH, t (ms)

Figure 8. Output Power versus Input Power Figure 9. Thermal Response versus Under Pulse Conditions (2 x MRF157) Pulse Width Note: Pulse data for this graph was taken in a push–pull circuit similar Note: to the one shown. However, the output matching network was Note: modified for the higher level of peak power.

f = 100 MHz Zin 7.5 VDD = 50 V IDQ = 800 mA 4.0 Pout = 600 W 2.0 Zo = 10 Ω (VCC – Vsat)2

Note: To determine ZOL*, use formula2P= Zo OL

*

Figure 10. Series Equivalent Impedance MRF157 MOTOROLA RF DEVICE DATA

Pout, POWER OUTPUT (kW) r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED), + C13 50 V – D2 R10 D.U.T. L3 R1 OUTPUT C3 R12 C7 R14 22 pF L1 C10 C9 C14 T1 L2 C11 L2 R15 C12 – C8 BIAS 36–50 V D3 R11 + R2 T2 R5 C4 R13 D.U.T. R4 R6 1023C1 — 1000 pF Ceramic Disc Capacitor L3 — 10 µH, 10 Turns #12 AWG Enameled Wire on 12 4 C2, C3, C4 — 0.1 µF Ceramic Disc Capacitor L3 — Fair–Rite Products Corp. Ferrite Toroid #5961000401 or Equivalent 11 R7 C5 — 0.01 µF Ceramic Chip Capacitor R1 , R2 — 1.0K Single Turn Trimpots5 1376C6, C12 — 0.1 µF Ceramic Chip Capacitor R3 — 10K Single Turn Trimpot C7, C8 — Two 2200 pF Ceramic Chip Capacitors in Parallel R4 — 470 Ohms, 2.0 Watts D1 C1 R3 C7, C8 — Each R5 — 10 Ohms R8 C9 — 820 pF Ceramic Chip Capacitor R6, R12, R13 — 2.0K Ohms C10, C11 — 1000 pF Ceramic Chip Capacitor R7 — 10K Ohms C13 — 0.47 µF Ceramic Chip Capacitor or Two Smaller R8 — Exact Value Depends on Thermistor R9 used C2 R9 C13 —Values in Parallel R8 — (Typically 5.0 – 10K) C14 — Unencapsulated Mica, 500 V. Two 1000 pF Units R9 — Thermistor, Keystone RL1009–5820–97–D1 or C14 — in Series, Mounted Under T2 R9 — Equivalent D1 — 1N5357A or Equivalent R10, R11 — 100 Ohms, 1.0W Carbon D2, D3 — 1N4148 or Equivalent. R14, R15 — EMC Technology Model 5308 or KDI IC1 — MC1723 (723) Voltage Regulator R14, R15 — Pyrofilm PPR 870–150–3 Power Resistors, L1, L2 — 15 ηH, Connecting Wires to R14 and R15, R14, R15 — 25 Ohms L1, L2 — 2.5 cm Each #20 AWG T1, T2 — 9:1 and 1:9 Impedance Ratio RF Transformers Unless otherwise noted, all resistors are 1/2 watt metal film type. All chip capacitors except C13 are ATC type 100/200B or Dielectric Laboratories type C17.

Figure 11. 2.0 to 50 MHz, 1.0 kW Wideband Amplifier RF POWER MOSFET CONSIDERATIONS MOSFET CAPACITANCES LINEARITY AND GAIN CHARACTERISTICS The physical structure of a MOSFET results in capacitors In addition to the typical IMD and power gain data pres-

between the terminals. The metal oxide gate structure deter- ented, Figure 5 may give the designer additional information mines the capacitors from gate–to–drain (Cgd), and gate–to– on the capabilities of this device. The graph represents the source (Cgs). The PN junction formed during the fabrication small signal unity current gain frequency at a given drain cur- of the TMOS FET results in a junction capacitance from rent level. This is equivalent to fT for bipolar transistors. drain–to–source (Cds). Since this test is performed at a fast sweep speed, heating of

These capacitances are characterized as input (Ciss), out- the device does not occur. Thus, in normal use, the higher

put (Coss) and reverse transfer (Crss) capacitances on data temperatures may degrade these characteristics to some ex- sheets. The relationships between the interterminal capaci- tent. tances and those given on data sheets are shown below. The

Ciss can be specified in two ways: DRAIN CHARACTERISTICS

1. Drain shorted to source and positive voltage at the gate. One figure of merit for a FET is its static resistance in the full–on condition. This on–resistance, VDS(on), occurs in the 2. Positive voltage of the drain in respect to source and zero linear region of the output characteristic and is specified un- volts at the gate. In the latter case the numbers are lower. der specific test conditions for gate–source voltage and drain

However, neither method represents the actual operat- current. For MOSFETs, VDS(on) has a positive temperature

ing conditions in RF applications. coefficient and constitutes an important design consideration at high temperatures, because it contributes to the power dissipation within the device.

DRAIN

Cgd GATE CHARACTERISTICS

The gate of the TMOS FET is a polysilicon material, and is

Ciss = Cgd + Cgs GATECC= C electrically isolated from the source by a layer of oxide. Theds oss gd + Cds C = C input resistance is very high — on the order of 10 9 ohms — rss gd C resulting in a leakage current of a few nanoamperes.gs SOURCE Gate control is achieved by applying a positive voltage slightly in excess of the gate–to–source threshold voltage,

VGS(th). MOTOROLA RF DEVICE DATA MRF157

, Gate Voltage Rating — Never exceed the gate voltage MOUNTING OF HIGH POWER RF rating. Exceeding the rated VGS can result in permanent POWER TRANSISTORS damage to the oxide layer in the gate region. The package of this device is designed for conduction Gate Termination — The gates of these devices are es- cooling. It is extremely important to minimize the thermal re- sentially capacitors. Circuits that leave the gate open–cir- sistance between the device flange and the heat dissipator. cuited or floating should be avoided. These conditions can If a copper heatsink is not used, a copper head spreader is result in turn–on of the devices due to voltage build–up on strongly recommended between the device mounting sur- the input capacitor due to leakage currents or pickup. faces and the main heatsink. It should be at least 1/4″ thick Gate Protection — These devices do not have an internal and extend at least one inch from the flange edges. A thin monolithic zener diode from gate–to–source. The addition of layer of thermal compound in all interfaces is, of course, es- an internal zener diode may result in detrimental effects on sential. The recommended torque on the 4–40 mounting the reliability of a power MOSFET. If gate protection is re- screws should be in the area of 4–5 lbs.–inch, and spring quired, an external zener diode is recommended. type lock washers along with flat washers are recommended. For die temperature calculations, the ∆ temperature from a IMPEDANCE CHARACTERISTICS corner mounting screw area to the bottom center of the Device input and output impedances are normally obtained flange is approximately 5°C and 10°C under normal operat- by measuring their conjugates in an optimized narrow band test ing conditions (dissipation 150 W and 300 W respectively). circuit. These test circuits are designed and constructed for a The main heat dissipator must be sufficiently large and number of frequency points depending on the frequency cover- have low R for moderate air velocity, unless liquid cooling is age of characterization. For low frequencies the circuits consist θ employed. of standard LC matching networks including variable capacitors for peak tuning. At increasing power levels the output imped- ance decreases, resulting in higher RF currents in the matching network. This makes the practicality of output impedance mea- CIRCUIT CONSIDERATIONS surements in the manner described questionable at power lev- At high power levels (500 W and up), the circuit layout be- els higher than 200–300 W for devices operated at 50 V and comes critical due to the low impedance levels and high RF 150–200 W for devices operated at 28 V. The physical sizes currents associated with the output matching. Some of the and values required for the components to withstand the RF components, such as capacitors and inductors must also currents increase to a point where physical construction of the withstand these currents. The component losses are directly output matching network gets difficult if not impossible. For this proportional to the operating frequency. The manufacturers reason the output impedances are not given for high power de- specifications on capacitor ratings should be consulted on vices such as the MRF154 and MRF157. However, formulas these aspects prior to design. like (VDS – Vsat) for a single ended design Push–pull circuits are less critical in general, since the 2Pout ground referenced RF loops are practically eliminated, and or 2((VDS – Vsat) 2) for a push–pull design can be used to the impedance levels are higher for a given power output. Pout High power broadband transformers are also easier to de- obtain reasonably close approximations to actual values. sign than comparable LC matching networks. EQUIVALENT TRANSISTOR PARAMETER TERMINOLOGY Collector .Drain Emitter .Source Base .Gate V(BR)CES .V(BR)DSS VCBO .VDGO IC .ID ICES .IDSS IEBO .IGSS VBE(on) .VGS(th) VCE(sat) .VDS(on) Cib .Ciss Cob .Coss hfe .gfs VCE(sat) .VR DS(on)CE(sat) = RI DS(on) = C ID MRF157 MOTOROLA RF DEVICE DATA,

PACKAGE DIMENSIONS

–A– NOTES:

U 1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982. 1 2. CONTROLLING DIMENSION: INCH.

K

INCHES MILLIMETERS DIM MIN MAX MIN MAX A 1.490 1.510 37.85 38.35 B 0.990 1.010 25.15 25.65 –B– VNC0.330 0.365 8.38 9.273D0.490 0.510 12.45 12.95 E 0.195 0.205 4.95 5.21 H 0.045 0.055 1.14 1.39 J 0.004 0.006 0.10 0.152Q4PL K 0.425 0.500 10.80 12.70 N 0.890 0.910 22.87 23.11 0.25 (0.010) MTAMBMQ0.120 0.130 3.05 3.30

D U 1.250 BSC 31.75 BSC

V 0.750 BSC 19.05 BSC

N H

STYLE 2: PIN 1. DRAIN

C E 2. GATE

3. SOURCE –T– J

SEATING PLANE CASE 368–03 ISSUE C MOTOROLA RF DEVICE DATA MRF157

, Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 MFAX: email is hidden – TOUCHTONE (602) 244–6609 HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, INTERNET: http://Design–NET.com 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298

MRF157 ◊ MOTOROLA RF DEVICEM RDFA1T5A7/D

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GENERAL DESCRIPTION QUICK REFERENCE DATA Dual, low leakage, platinum barrier, SYMBOL PARAMETER MAX. MAX. MAX. UNIT schottky barrier rectifier diodes in a full pack, plastic envelope featuring PBYR30- 35CTF 40CTF 45CTF low forward voltage drop and VRRM Repetitive peak reverse 35 40 45 V absence of st
GENERAL DESCRIPTION QUICK REFERENCE DATA
GENERAL DESCRIPTION QUICK REFERENCE DATA Dual, low leakage, platinum barrier, SYMBOL PARAMETER MAX. MAX. MAX. UNIT schottky rectifier diodes in a plastic envelope featuring low forward PBYR30- 35CT 40CT 45CT voltage drop and absence of stored VRRM Repetitive peak reverse 35 40 45 V charge. These dev
GENERAL DESCRIPTION QUICK REFERENCE DATA
GENERAL DESCRIPTION QUICK REFERENCE DATA Dual, low leakage, platinum barrier SYMBOL PARAMETER MAX. MAX. MAX. UNIT schottky rectifier diodes in a plastic envelope featuring low forward PBYR30- 60PT 80PT 100PT voltage drop and absence of stored VRRM Repetitive peak reverse 60 80 100 V charge. These de