Download: UAL EVALUA General Description Features

19-1463; Rev 0; 5/99 KIT MAN UAL EVALUA TION EET LOWS D ATA SH FOL +3.6V, 1W Autoramping Power General Description Features The MAX2235 low-voltage, silicon RF power amplifier ♦ 800MHz to 1000MHz Operation (PA) is designed for use in the 900MHz frequency band. It operates directly from a single +2.7V to +5.5V supply, ♦ High Output Power at 836MHz making it suitable for use with 3-cell NiCd or 1-cell Li-Ion +32.5dBm at +5.0V batteries. The device delivers +30dBm (1W) typical out- +30dBm at +3.6V put power from a +3.6V supply or +28dBm from a +2.7V +29dBm at +3.0V supply. +28dBm at +2.7V The MAX...
Author: Richard Shared: 7/30/19
Downloads: 202 Views: 3500

Content

19-1463; Rev 0; 5/99 KIT MAN

UAL EVALUA

TION EET LOWS D ATA SH FOL +3.6V, 1W Autoramping Power

General Description Features

The MAX2235 low-voltage, silicon RF power amplifier ♦ 800MHz to 1000MHz Operation (PA) is designed for use in the 900MHz frequency band. It operates directly from a single +2.7V to +5.5V supply, ♦ High Output Power at 836MHz making it suitable for use with 3-cell NiCd or 1-cell Li-Ion +32.5dBm at +5.0V batteries. The device delivers +30dBm (1W) typical out- +30dBm at +3.6V put power from a +3.6V supply or +28dBm from a +2.7V +29dBm at +3.0V supply. +28dBm at +2.7V The MAX2235’s gain is adjustable over a 37dB range. ♦ +2.7V to +5.5V Single-Supply Operation A power-control pin controls gain and bias to maintain optimum efficiency, even at lower output power levels, ♦ Automatic Power-Up/Power-Down Ramp thus extending the operating life of the battery. At ♦ Direct On/Off Keying (OOK) without Intersymbol +30dBm output power, efficiency is typically 47%. An Interference or VCO Pulling additional power-saving feature is a shutdown mode that typically reduces supply current below 1µA. ♦ 37dB Power-Control Range A key feature of this PA is its autoramping capability. ♦ 47% Efficiency During turn-on and turn-off periods, the RF envelope is controlled to approximate a raised cosine on the rising ♦ <1µA Supply Current in Shutdown Mode and falling edge, thereby minimizing transient noise ♦ Small 20-Pin TSSOP Package with Heat Slug and spectral splatter. The ramp time is set by selecting the value of an external capacitor. The MAX2235 is intended for use in constant envelope Ordering Information applications such as AMPS, two-way paging, or FSK- based communications in the 900MHz ISM band. The PART TEMP. RANGE PIN-PACKAGE device is available in a thermally enhanced 20-pin MAX2235EUP -40°C to +85°C 20 TSSOP-EP TSSOP package with a heat slug.

Applications

900MHz ISM-Band Applications Pin Configuration Two-Way Pagers TOP VIEW Analog Cellular Phones RFIN 1 20 GC Microcellular GSM (Power Class 5) GND 2 19 SHDN Wireless Data Networks VCC 3 18 GND

Functional Diagram VCC 4 17 GND

V V MAX2235CC CC VCC VCC VCC 5 16 RFOUT4358, 9 GND 6 15 RFOUT RAMP GND 7 14 GND REF MAX2235BIAS VCC 8 13 GND19

SHDN

20 VCC 9 12 REF GC RFOUT 15, 16 GND 10 11 RAMP RFIN TSSOP-EP VGA NOTE: THE GROUND OF THE OUTPUT STAGE IS CONNECTED TO THE UNDERSIDE METAL SLUG. 2 6, 7, 10 13, 14, 17, 18, SLUG GND GND GND NOTE: SOLDER UNDERSIDE OF METAL SLUG TO BOARD GND PLANE. _ Maxim Integrated Products 1

For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.

,

ABSOLUTE MAXIMUM RATINGS

VCC to GND...-0.3V to +6.5V Continuous Power Dissipation (TA = +70°C) SHDN to GND...-0.3V to (VCC + 0.3V) TSSOP (derate 80mW/°C above TA = +70°C) ...6.4W GC to GND ...-0.3V to (VCC + 0.3V) Operating Temperature Range ...-40°C to +85°C RF Input Power ...+13dBm (20mW) Junction Temperature ...+150°C Maximum Load Mismatch without Damage, Storage Temperature Range ...-65°C to +150°C VCC = +2.7V to +3.4V, Any Load Phase Angle, Lead Temperature (soldering, 10sec) ...+300°C Any Duration...20:1 Maximum Load Mismatch without Damage, VCC = +3.4V to +5.5V, Any Load Phase Angle, Any Duration...8:1 Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

DC ELECTRICAL CHARACTERISTICS

(VCC = +2.7V to +5.5V, GC = RAMP = REF = unconnected, no input signal applied, TA = -40°C to +85°C, unless otherwise noted. Typical values are at VCC = +3.6V and TA = +25°C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS SHDN Logic High VIH 2.0 V SHDN Logic Low VIL 0.5 V SHDN = GND 0.5 10 Shutdown Supply Current ISHDN 2.7V < VCC < 3.4V, SHDN = GND, µA1 TA = +55°C Standby Supply Current ISTBY VGC < 0.4 20 mA V SHDN = 2.0V 0.5 SHDN Input Current IINSHDN µA V SHDN < 0.5V -0.5 0.5 V SHDN < 0.5V, VGC < 0.4V -0.5 0.5 GC Input Current IGC µA V SHDN > 2.3V, VGC > 0.6V -10 1.0 GC Open-Circuit Voltage VGCNOM 2.0 2.2 2.4V2_,

AC ELECTRICAL CHARACTERISTICS

(MAX2235 Evaluation Kit, GC = unconnected, PRFIN adjusted to give PRFOUT = +30dBm, fRFIN = 836MHz, VCC = VSHDN = +3.6V, TA = +25°C, unless otherwise noted.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Operational Frequency Range f (Note 2) RFIN 800 1000 MHz VCC = 5.0V 32.5 VCC = 3.6V 30.3 Minimum Output Power PRFOUT VCC = 3.0V (Note 2) 27.0 28.7 dBm VCC = 3.0V, TA = TMIN to TMAX 25.5 VCC = 2.7V 28.0 Power Added Efficiency PAE 47 % PRFOUT = +30dBm 610 PRFIN adjusted to give PRFOUT = +24dBm 315 Average Supply Current ICC mA PRFIN = 0dBm, VGC adjusted to give 305 PRFOUT = 24dBm Power Gain GP 24 26 dB Gain-Control Range (Note 3) 0.6V < VGC < 2.3V 37 dB Auto-Power Ramping-Up dP/dt 1.6 mW/µs Maximum Slope (Note 4) Auto-Power Ramping-Down dP/dt -1.3 mW/µs Minimum Slope (Note 4) Input VSWR VSWR 50Ω source impedance 1.5:1 Standby Mode Input VSWR ∆ Input VSWR relative to input impedance inVSWR 1.5:1 Change operating mode Maximum Nonharmonic VCC = 2.7V to 5.5V, 6:1 VSWR at any phaseSpurious Output Due to Load -60 dBc angle Mismatch Noise Power 30kHz BW at offset = 45MHz -90 dBm Harmonic Suppression (Note 5) PRFIN = +7dBm 30 38 dBc V SHDN = 0.5V 40 48 Off-Isolation PRFIN = 0dBm dB GC = GND 25 36 Note 1: Guaranteed by design and characterization. Note 2: For optimum performance at a given frequency, design the output matching network for maximum output power. Note 3: Gain is monotonic with VGC. Note 4: 0.068µF capacitor from RAMP to REF. Time is measured from SHDN low-to-high transition to +29dBm output power, or from SHDN high-to-low transition to -25dBm output power. Note 5: Harmonics measured on the evaluation kit, which provides some harmonic attenuation in addition to the rejection provided by the IC. The combined suppression is specified. _ 3,

Typical Operating Characteristics

(MAX2235 Evaluation Kit, GC = unconnected, fRFIN = 836MHz, VCC = VSHDN = +3.6V, TA = +25°C, unless otherwise noted.) OUTPUT POWER SUPPLY CURRENT vs. OUTPUT POWER vs. VOLTAGE AT GC PIN OUTPUT POWER vs. INPUT POWER 700 40 35 TA = -40°C PRFIN = 0dBm T VA = -40°C CC = +5.0V 600 TA = +25°C 30 30 VCC = +3.6V TA = +85°C V = +3.0V 500 TA = +25°C

CC

TA = +85°C 400 20 VCC = +2.7V 300 15 200 10 100 -10 0 -200510 15 20 25 30 35 0 0.5 1.0 1.5 2.0 2.5 0 -25 -20 -15 -10 -50510 OUTPUT POWER (dBm) VGC (V) INPUT POWER (dBm) OUTPUT POWER vs. INPUT POWER SECOND AND THIRD HARMONICS AND TEMPERATURE vs. INPUT POWER OUTPUT POWER vs. FREQUENCY 35 0 35 TA = -40°C MATCHED AT PRFIN = +3dBm 30 836MHzTA = +25°C -10 2nd 25 25 PRFIN = -5dBm -20 20 3rd 20 TA = +85°C PRFIN = -13dBm-30 15 15 -40 10 10 5 -50 5 PRFIN = -21dBm 0 -60 0 -25 -20 -15 -10 -50510 -25 -20 -15 -10 -50510 820 825 830 835 840 845 850 855 INPUT POWER (dBm) INPUT POWER (dBm) INPUT FREQUENCY (MHz) POWER GAIN vs. OUTPUT POWER EFFICIENCY vs. OUTPUT POWER POWER GAIN vs. OUTPUT POWER AND TEMPERATURE 60 40 40 VCC = +5.0V VCC = +3.6V 35 35 TA = -40°C50 VCC = +2.7V 30 30 40 VCC = +3.6V TA = +25°C VCC = +3.0V 25 25 VCC = +3.0V20 TA = +85°C30 VCC = +2.7V 20 15 15 10 10 10 VCC = +5.0V550000510 15 20 25 30 350510 15 20 25 30 350510 15 20 25 30 35 OUTPUT POWER (dBm) OUTPUT POWER (dBm) OUTPUT POWER (dBm) 4 _ EFFICIENCY (%) OUTPUT POWER (dBm) ICC (mA) MAX2235 toc07 MAX2235 toc04 MAX2235 toc01 POWER GAIN (dB) HARMONIC POWER (dBm) OUTPUT POWER (dBm) MAX2235 toc08 MAX2235 toc05 MAX2235 toc02 POWER GAIN (dB) OUTPUT POWER (dBm) OUTPUT POWER (dBm) MAX2235 toc09 MAX2235 toc06 MAX2235 toc03,

Typical Operating Characteristics (continued)

(MAX2235 Evaluation Kit, GC = unconnected, fRFIN = 836MHz, VCC = VSHDN = +3.6V, TA = +25°C, unless otherwise noted.) RISE TIME vs. RAMPING CAPACITANCE FALL TIME vs. RAMPING CAPACITANCE 1400 1200 1200 FULL POWER = +10dBm FULL POWER = +30dBm1000 1000 FULL POWER = +20dBm 800 FULL POWER = +10dBm FULL POWER = +30dBm FULL POWER = +20dBm00020 40 60 80 100 120 0 20 40 60 80 100 120 CAPACITANCE (nF) CAPACITANCE (nF)

Pin Description

PIN NAME FUNCTION RF Input. A DC blocking capacitor in series with RFIN is required. The value of the capacitor depends on 1 RFIN the operating frequency. GND connection for the input stage (variable-gain amplifier). Connect to the circuit board ground plane 2 GND with a separate low-inductance path (via). 3 VCC Supply Voltage Input for the Input Stage. Bypass with its own 100pF low-inductance capacitor to GND. Supply Voltage Input for Bias Circuitry. Bypass with its own 100pF low-inductance capacitor and a 1000pF 4 VCC capacitor to GND, to minimize RF signal coupling into the bias circuits. 5 VCC Supply Voltage Input for the Input Stage. Bypass with its own 22pF low-inductance capacitor to pins 6 and 7. GND Connection for the Second-Stage Amplifier (driver). Connect to the circuit board ground plane with a 6, 7, 10 GND separate low-inductance path (via). Supply Voltage Input for the Second Stage. Bypass with its own 220pF and 1000pF low-inductance 8 VCC capacitors to GND. 9 VCC Supply Voltage Input for the Second Stage. Connect to pin 8. Power Ramp Pin. Connect a capacitor between RAMP and REF to provide a gradual linear power-up/down 11 RAMP ramp. See Detailed Description. 12 REF Reference Voltage for RAMP Capacitor. The reference is internally set to 1.9V. 13, 14, GND Connection for the Power Stage. Solder the slug to the circuit board ground plane. Connect pins 13, 17, 18, GND 14, 17, and 18 to the slug with a straight board trace under the chip.

SLUG

Power Amplifier Output. See Typical Operating Circuit for an example of a matching network, which pro- 15 RFOUT vides optimal output power at 836MHz. Connect to pin 16. 16 RFOUT Power Amplifier Output. Connect to pin 15. 19 Shutdown Pin. Drive SHDN low to turn the device off. Drive above 2.0V to turn the device on. Drive VSHDN SHDN > 2.0V and VGC < 0.4V for standby mode. Gain-Control Pin. Apply V 20 GC GC between 0.6V and 2.3V to control the output power with a monotonic dB/V relationship. See the Typical Operating Characteristics for a typical relationship. _ 5 RISE TIME (µs) MAX2235 toc10 FALL TIME (µs) MAX2235 toc11,

Typical Operating Circuit

JU2 470pF J1 100pF 8.2nH 1000pF

VCC

1 RFIN 20GC SMA3219 GND SHDN 2 JU1 3 18 470pF 1000pF VCC VCC GND 4 17 VCC MAX2235 GND VCC 1000pF * 1500pF5 16 68pFVCC RFOUT 100pF 100pF 22pF J26 GND RFOUT 15 SMA 7 GND GND 14 47pF 11pF8VGND 13CC VCC VCC REF 1000pF 100pF 10 0.068µFGND RAMP 11 J3

VCC

J4 0.01µF 1µF * VALUE OF OUTPUT INDUCTOR DEPENDS ON APPLICATION.

Detailed Description stage operates in class A and remains on in standby

mode to ensure that the VSWR at the input does not The MAX2235 power amplifier (PA) operates over a vary more than 1.5:1 compared with normal operation. wide frequency range of 800MHz to 1000MHz. The sig- The input stage typically requires an external inductor nal path consists of three stages: the input stage, the to achieve an optimum input VSWR. driver stage, and the power stage. There are matching circuits between the first and second stages, and Second Stage (Driver) between the second and third stages. The bias circuits The driver produces a signal large enough to drive the process external commands to control the device’s power stage into saturation. The driver stage operates power-up/down and the gain of the PA. in Class C and is off during standby. Input Stage Second- and Third-Stage Matching The first stage is a variable-gain amplifier with 37dB The interstage matching networks provide optimal load- gain-control range. The input transistor acts as a ing and power transfer. The circuits are on-chip to save transconductor with constant bias current. Gain control board space. The bandwidths of the matching net- is achieved by steering the signal current from the input works allow the PA to operate over a wide frequency transistor to the first output matching network (to drive range. the second stage) or to a separate supply pin. This 6 _, Third Stage (Power Stage) Table 1. Operating Modes This last stage delivers 30dBm to a 50Ω load. It oper- ates in Class E to achieve a high power-added efficien- SHDN GC MODE cy (PAE). Proper output matching is required for >2.0V >0.6V On optimal output power. The output of the power stage requires a low-series-resistance pull-up inductor with a >2.0V <0.4V Standby minimum current rating of 1.5A. See the Typical <0.5V Don’t care Shutdown Operating Circuit for an example of an output matching circuit. Board Assembly Precaution Biasing and Power Control Solder the underside metal slug evenly to the boardground plane for optimal performance. Fill all vias in the SHDN, GC, RAMP, and REF are bias and power-control area under the slug. For maximum power gain and sat- pins. Drive SHDN below 0.5V to turn off the entire chip, urated output power, ensure that the entire slug makes and drive SHDN above 2.0V to turn on the device. contact with the board ground. When SHDN is high, a VGC from 0.6V to 2.3V continu- ously controls the gain in the first stage (VGA) and the output power. Chip Information Drive GC below 0.4V to put the device in standby mode with only the first stage on. If GC is unconnected and TRANSISTOR COUNT: 668 V SHDN > 2.0V, the device is set to maximum gain. Table 1 summarizes these operating modes. Power Ramping Control A capacitor connected between RAMP and REF con- trols the output power rise/fall time to reduce transient noise when SHDN turns the device on and off. Because the ramp is approximately a raised cosine, this device can be used in direct On/Off Keying (OOK) applications with minimum intersymbol interference. The value of the ramping capacitor is determined from the Rise/Fall Time vs. Ramping Capacitance curves in the Typical Operating Characteristics. _ 7, Package Information8_TSSOP.EPS]
15

Similar documents

  PACKAGE LINE-UP
PACKAGE LINE-UP PLASTIC PACKAGE LINE-UP (1) : Under development : Under planning (mm) 58910 12 14 16 18 20 22 24 28 30 32 36 40 42 48 52 64 SIP Single Inline Package 2.54 – ● ●● ● ● 2.54 – ● ● HSIP Single Inline Package 1.778 – ● 325 ● ● ● ZIP Zig-zag Inline Package 1.27 300 ● ● ● ●● ●● ● ●● ● ● D
MANUA L EVALUA T EET FOLLOW S General Description Features
19-4797; Rev 0; 2/99 MANUA L ION KIT EVALUA T DATA SH EET FOLLOW S General Description Features The MAX2470/MAX2471 are flexible, low-cost, high- ♦ +2.7V to +5.5V Supply Range reverse-isolation buffer amplifiers for applications with discrete and module-based VCO designs. Both feature ♦ Input Freque
KIT EVALUA TION HEET FOLLOW General Description Features
19-1384; Rev 1; 2/99 KIT EVALUA TION DATA S HEET FOLLOW S 400MHz to 2500MHz SiGe General Description Features The MAX2640/MAX2641 are low-cost, ultra-low-noise ♦ Wide Operating Frequency Range amplifiers designed for applications in the cellular, PCS, MAX2640: 400MHz to 1500MHz GPS, and 2.4GHz ISM f
Technical Note UHF BAND GaAs POWER AMPLIFIER
Technical Note UHF BAND GaAs POWER AMPLIFIER Specifications are subject to change without notice. DESCRIPTION PIN CONFIGURATION (TOP VIEW) MGF7168C is a monolithic microwave integrated circuit for use in UHF-band power amplifier. FEATURES Pi GND - Low voltage operation Vg1 Vd=3.2V - High output powe
400MHz LOW NOISE AMPLIFIER WITH THE BFG540W/X
Gerstweg 2, 6534 AE Nijmegen, The Netherlands Report nr. : RNR-T45-97-B-0920 Author : T.F. Buss Date : 20-11-97 Department : P.G. Transistors & Diodes, Development 400MHz LOW NOISE AMPLIFIER WITH THE BFG540W/X Abstract: This application note contains an example of a Low Noise Amplifier with the BFG5
VALUAT AVAILAB General Description Features
19-1635; Rev 0; 1/00 VALUAT ION KITEEAVAILAB L Complete Dual-Band General Description Features The MAX2360 dual-band, triple-mode complete transmit- Dual-Band, Triple-Mode Operation ter for cellular phones represents the most integrated and architecturally advanced solution to date for this applica
 2 IC PACKAGE ELECTRICAL CHARACTERISTICS
2 IC PACKAGE ELECTRICAL CHARACTERISTICS Tables 1, 2 and 3 show electrical characteristics of packages of various types. They are called LCR values, which include Ls, Lm, Co, Cm, and Rs. As Fig. 4 shows, Ls and Lm represents, respectively, self-inductance and mutual inductance; Co and Cm, self-capac
  PACKAGE STRUCTURE STRUCTURE OF METAL SEALED DIP
PACKAGE STRUCTURE The following diagrams show the structure of typical IC packages. STRUCTURE OF METAL SEALED DIP CHIP LID (Au or Ni PLATING) AI WIRE SEALING MATERIAL (Au/Sn or Pb/Sn) CERAMIC BODY LEAD (Pb/Sn or Au PLATING) SOFT SOLDER (Pb/Sn) STRUCTURE OF PLASTIC MOLDED DIP SILVER SPOT PLATING EP
MITSUBISHI INTEGRATED CIRCUIT PACKAGES
IC PACKAGE CLASSIFICATION The following pages classify Mitsubishi Packages by the sealing method and the mounting method. The conventions shown here are used throughout this DATA BOOK, so we suggest you take the time to review them. PLASTIC PACKAGES [Mounting Method] [ No. of ] [Type] [Outline]pin
APPLICATION NOTE5WClass-AB Amplifier with the BLV904 for 935 − 960 MHz AN98019
APPLICATION NOTE5WClass-AB Amplifier with the BLV904 for 935 − 960 MHz AN98019 INTRODUCTION This application note contains information ona5Wclass-AB amplifier based on the SMD transistor BLV904. The amplifier described can be used for driver stages in cellular radio base stations in the GSM band 935
APPLICATION NOTE 100 − 450 MHz 250 W Power Amplifier with the BLF548 MOSFET AN98021
APPLICATION NOTE 100 − 450 MHz 250 W Power Amplifier with the BLF548 MOSFET AN98021 CONTENTS 1 INTRODUCTION 2 DESIGN CONSIDERATIONS 3 AMPLIFIER CONCEPT 4 INPUT CIRCUITRY 5 ADJUSTMENT OF THE AMPLIFIER 5.1 Tuning the outputnetwork 5.2 Testing the unit under RF conditions 5.3 Tuning the unit’s inputnet
APPLICATION NOTE A broadband3Wamplifier for band IV/V TV transposers based on the BLW898 AN98015
APPLICATION NOTE A broadband3Wamplifier for band IV/V TV transposers based on the BLW898 AN98015 CONTENTS 1 ABSTRACT 2 INTRODUCTION 3 AMPLIFIER ELECTRICAL DESIGN OBJECTIVES 4 DESIGN OF THE AMPLIFIER 4.1 Mounting the transistor 4.2 Positioning of the matching capacitors (see Figs 3 and 4) 5 AMPLIFIER
APPLICATION NOTE A broadband 150 W amplifier for band IV & V TV transmitters based on the BLV862 AN98014
APPLICATION NOTE A broadband 150 W amplifier for band IV & V TV transmitters based on the BLV862 AN98014 CONTENTS 22 APPENDIX F4 23 APPENDIX G1 1 ABSTRACT 24 APPENDIX G2 2 INTRODUCTION 25 APPENDIX H1 3 TRANSISTOR DESCRIPTION 26 APPENDIX H2 3.1 Main properties of the BLV862 3.2 Internal matching 3.3
APPLICATION NOTE A wide-band class-A linear power amplifier (174 − 230 MHz) with 2 transistors BLV33F ECO8005
APPLICATION NOTE A wide-band class-A linear power amplifier (174 − 230 MHz) with 2 transistors BLV33F ECO8005 CONTENTS 1 ABSTRACT 2 INTRODUCTION 3 DESIGN OF THE AMPLIFIER 4 ADJUSTMENTS OF THE AMPLIFIER 5 ASSEMBLING OF THE AMPLIFIER AND MECHANICAL DATA 6 MEASURED RESULTS 7 CONCLUSION 8 REFERENCES 199
APPLICATION INFORMATION 900 MHz low noise amplifier with the BFG480W
APPLICATION INFORMATION 900 MHz low noise amplifier with the BFG480W ABSTRACT • Description of the product The BFG480W, one of the Philips double polysilicon wideband transistors of the BFG400W series. • Application area Low voltage high frequency wireless applications. • Presented application A low
APPLICATION NOTE A wide-band class-A linear power amplifier (174 − 230 MHz) with two transistors BLV33 ECO7904
APPLICATION NOTE A wide-band class-A linear power amplifier (174 − 230 MHz) with two transistors BLV33 ECO7904 CONTENTS 1 ABSTRACT 2 INTRODUCTION 3 DESIGN OF THE AMPLIFIER 4 ADJUSTMENTS OF THE AMPLIFIER 5 ASSEMBLING OF THE AMPLIFIER AND MECHANICAL DATA 6 MEASURED RESULTS 7 CONCLUSION 8 REFERENCES 19
APPLICATION NOTE A wide-band linear power amplifier (470 − 860 MHz) with two transistors BLW34 ECO7901
APPLICATION NOTE A wide-band linear power amplifier (470 − 860 MHz) with two transistors BLW34 ECO7901 CONTENTS 1 ABSTRACT 2 INTRODUCTION 3 THEORETICAL CONSIDERATIONS 3.1 The equivalent circuit of the BLW34 3.1.1 The output network 3.1.2 The input network 4 THE HYBRID COUPLED AMPLIFIER 4.1 Practical
APPLICATION INFORMATION 400 MHz low noise amplifier with the BFG540W/X
APPLICATION INFORMATION 400 MHz low noise amplifier with the BFG540W/X ABSTRACT • Description of the product The BFG540W/X is one of the Philips silicon planar epitaxial wideband transistors of the BFG500 series. • Application area Low voltage analog and digital UHF-applications in the GHz range. •
DISCRETE SEMICONDUCTORS DATA SHEET BFG540W BFG540W/X; BFG540W/XR NPN 9 GHz wideband transistor Product specification 1997 Dec 04 Supersedes data of August 1995
DISCRETE SEMICONDUCTORS DATA SHEET BFG540W BFG540W/X; BFG540W/XR NPN 9 GHz wideband transistor Product specification 1997 Dec 04 Supersedes data of August 1995 File under Discrete Semiconductors, SC14 FEATURES MARKING • High power gain TYPE NUMBER CODE • Low noise figure BFG540W N9 page43• High tran
INTEGRATED CIRCUITS DATA SHEET I2C-bus allocation table General 1997 Mar 03 File under Integrated Circuits, IC12
INTEGRATED CIRCUITS DATA SHEET I2C-bus allocation table General 1997 Mar 03 File under Integrated Circuits, IC12 I2C-BUS ALLOCATION TABLE (IN GROUP ORDER) The group number represents the hexadecimal equivalent of the four most significant bits of the slave address (A6-A3). Group 0 (0000) 000- Genera
DISCRETE SEMICONDUCTORS DATA SHEET BFG540; BFG540/X; BFG540/XR NPN 9 GHz wideband transistor Product specification September 1995 File under Discrete Semiconductors, SC14
DISCRETE SEMICONDUCTORS DATA SHEET BFG540; BFG540/X; BFG540/XR NPN 9 GHz wideband transistor Product specification September 1995 File under Discrete Semiconductors, SC14 FEATURES PINNING • High power gain PIN DESCRIPTION handbook, 2 c4olumns 3 • Low noise figure BFG540 (Fig.1) Code: N37 • High tran
Order this document SEMICONDUCTOR TECHNICAL DATA by BFR93ALT1/D The RF Line
Order this document SEMICONDUCTOR TECHNICAL DATA by BFR93ALT1/D The RF Line Designed primarily for use in high–gain, low–noise, small–signal UHF and microwave amplifiers constructed with thick and thin–film circuits using surface mount components. • T1 Suffix Indicates Tape and Reel Packaging of 3,0
DATA SHEET IC12 LCD selection guide
INTEGRATED CIRCUITS DATA SHEET IC12 LCD selection guide Objective specification 1997 Mar 04 File under Integrated Circuits, IC12 1997 Mar 04 2 LCD SEGMENT DRIVERS Drive capability, Number of segments at LCD Typ. On-chip a Multiplex rate (Duty) voltage system bias Special Gold Device voltage Interfac
Semiconductors for Television and
Types added to the range since the last issue of the IC02 CD-ROM (1997 issue) are shown in bold print. In addition, types marked with an asterisk (*) are also in this booklet. PAGE 80C528; 83C528 CMOS single-chip 8-bit microcontroller; I2C-bus 80C652; 83C652 CMOS single-chip 8-bit microcontroller; I
Semiconductors for Televsion
Types added to the range since the last issue of the IC02 CD-ROM (1997 issue) are shown in bold print. In addition, types marked with an asterisk (*) are also in this booklet. PAGE TUNING/TUNER Tuning * SAB6456; SAB6456T Sensitive 1 Ghz divide-by-64/divide-by-256 switchable prescaler 154 * TDA8725T
I2C peripheral selection guide
Philips Semiconductors I2C peripheral selection guide GENERAL PURPOSE ICs 68000-Based CMOS Microcontrollers 68070 68000 CPU/MMU/UART/DMA/timer LCD Drivers 93CXXX UST/I2C/34k ROM/512 RAM OM4085 Universal LCD driver for low multiplex rates PCF211XC family LCD drivers 80C51-Based CMOS Microcontrollers*
DISCRETE SEMICONDUCTORS DATA SHEET Selection guide RF Wideband Transistors 1997 Nov 24 File under Discrete Semiconductors, SC14
DISCRETE SEMICONDUCTORS DATA SHEET Selection guide RF Wideband Transistors 1997 Nov 24 File under Discrete Semiconductors, SC14 FIRST GENERATION NPN WIDEBAND TRANSISTORS (fT up to 3.5 GHz) PACKAGE fT / IC CURVE LEADED SURFACE-MOUNT (see Fig.1) SOT54 SOT23 SOT89 SOT143 SOT223 SOT323 (1) BFT25 BF747 (
Selection guide
Selection guide INTEGRATED FRONT-END SYSTEMS/MIXERS/AMPLIFIERS INPUTVITYPE DESCRIPTION CC CC PINS Pkg FREQUENCY (V) (mA) (GHz) Image Reject Front-End Systems SA1920 dual-band 3.6 - 3.9 HB Rx: 41.1 48 BE 0.869 - 0.96 or 800/1900 MHz HB Tx: 21.3 at 3.75 V 1.93 - 1.99 LNA + IRM + IFamp. SA1921 dual-ban
DISCRETE SEMICONDUCTORS DATA SHEET Selection guide Wideband Hybrid Amplifier Modules 1998 Mar 19 File under Discrete Semiconductors, SC16
DISCRETE SEMICONDUCTORS DATA SHEET Selection guide Wideband Hybrid Amplifier Modules 1998 Mar 19 File under Discrete Semiconductors, SC16 TYPE NUMBER POWER GAIN SLOPE FLATNESS RETURN LOSS COMPOSITE (dB) CABLE (dB) (INPUT/OUTPUT) TRIPLE BEAT EQUIVALENT MAX. (dB) (dB) (SL) MIN. MAX. (dB) notes: table
RF COMMUNICATIONS PRODUCTS AN1993 High sensitivity applications of low-power RF/IF integrated circuits 1997 Aug 20 Philips Semiconductors
RF COMMUNICATIONS PRODUCTS AN1993 High sensitivity applications of low-power RF/IF integrated circuits 1997 Aug 20 Philips Semiconductors High sensitivity applications of low-power RF/IF integrated circuits AN1993 ABSTRACT THE BASICS This paper discusses four high sensitivity receivers and IF First