Download: APPLICATION INFORMATION 400 MHz low noise amplifier with the BFG540W/X

APPLICATION INFORMATION 400 MHz low noise amplifier with the BFG540W/X,

ABSTRACT

• Description of the product The BFG540W/X is one of the Philips silicon planar epitaxial wideband transistors of the BFG500 series. • Application area Low voltage analog and digital UHF-applications in the GHz range. • Presented application A low noise amplifier for CDMA mode of operation for 400 MHz with a low power consumption. • Main results At a frequency of 400 MHz, a supply voltage of 3.0 V and a current consumption of approximately 7.5 mA, the amplifier has an insertion power gain of approximately 15.5 dB, a noise figure of approximately 1.0 dB and a third order intercept point of approximately 2 dBm (measured at input). PHILIPS ELECTRONICS N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. 1999 Dec 22 2,

INTRODUCTION

With the Philips silicon wideband transistors BFG540W/X, it is possible to design Low Noise Amplifiers (LNAs) for UHF applications with a low current and a low supply voltage. These amplifiers are well suited for the new generation low voltage high frequency wireless applications. This application note gives an example of an LNA for 400 MHz Code Division Multiple Access (CDMA) mode of operation (Chinese market). CIRCUIT DESCRIPTION The following initial conditions apply for the amplifier design: • Vsupply = 3.0 V • VCE = 2 V • IC < 10 mA • f = 400 MHz. The circuit is designed to show the following performance: • s 221 ≈ 15 dB • VSWRIN < 2 • VSWROUT < 2 • NF < 1.5 dB • IP3i > 0 dBm. The input and output matching is realised with an LC-combination. Also extra emitter inductance (micro stripline) is used on both emitter leads to improve the matching and the noise figure. CIRCUIT DIAGRAM handbook, full pagewidth R1 R3 +Vsupply C2 C3 C4 C5 L2 L1 W1 R2 C6 output 50 Ω C1 input 50 Ω TR1 C7 µS1, L1 µS2: L2 µS1 µS2 D1 L3 MGS729 W2 Fig.1 Circuit diagram. 1999 Dec 22 3, COMPONENT LIST Table 1 Component list for the 400 MHz LNA COMPONENT VALUE UNIT SIZE, MANUFACTURER PURPOSE, COMMENT TR1 BFG540W/X SOT343N Philips active element R1 22 kΩ 0603 Philips collector to base bias R2 22 Ω 0603 Philips s22 and stability improvement; reducing gain R3 100 Ω 0603 Philips collector bias, levelling hFE spread C1 150 pF 0603 NP0 Philips input to base match C2 150 pF 0603 NP0 Philips 400 MHZ short (L1 to ground) C3 22 nF 0603 X7R Philips LF short; IP3 improvement C4 22 nF 0603 X7R Philips LF short; IP3 improvement C5 150 pF 0603 NP0 Philips 400 MHZ short (L2 to ground) C6 8.2 pF 0603 NP0 Philips collector to output match C7 4.7 pF 0603 NP0 Philips collector to emitter output match; stability improvement L1 22 nH 0805CS Coilcraft input match; base bias L2 22 nH 0805CS Coilcraft output match; collector bias µS1 see Table 2 emitter induction: micro stripline and via-hole µS2 see Table 2 emitter induction: micro stripline and via-hole PCB FR4 εr = 4.6; d = 0.5 mm Table 2 Dimensions of the micro striplines µS1 and µS2 (see Fig.1) DIMENSION VALUE UNIT DESCRIPTION L1 2.5 mm length micro stripline; Zo ≈ 48 Ω L2 1.0 mm length interconnect micro stripline and via-hole area L3 1.0 mm length via-hole area W1 0.5 mm width micro stripline W2 1.0 mm width via-hole area D1 0.4 mm diameter of via-hole 1999 Dec 22 4, BOARD LAYOUT The layout has been designed with the Hewlett Packard Microwave Design System (HP-MDS). handbook, full pagewidth µS1 input C1 output C6 C7 TR1 L1 C2 R2 C3 Vsupply L2 R1 C4 R3 µS2 C5 MGS730 Fig.2 PCB layout. 1999 Dec 22 5,

MEASUREMENTS

Measurements have been done on a simulation model (with realistic RF models of all parts used) as well as on an actual printed-circuit board. The measurements have been done under the following conditions (unless otherwise specified): • Vsupply = 3.0 V • Isupply = 8 mA • f = 400 MHz. Table 3 Measuring results of the 400 MHz LNA SYMBOL PARAMETER CONDITIONS VALUE UNIT s 221 insertion power gain note 1 Spice simulation model 15.5 dB actual printed-circuit board 15.6 dB s 212 reverse insertion power attenuation note 1 Spice simulation model −26.2 dB actual printed-circuit board −28 dB VSWRIN input voltage standing wave ratio note 1 Spice simulation model 1.7 actual printed-circuit board 1.8 VSWROUT output voltage standing wave ratio note 1 Spice simulation model 1.6 actual printed-circuit board 2.0 NF noise figure note 2 Spice simulation model 1.3 dB actual printed-circuit board 1.0 dB IP3i third order intercept point ∆f = 1 MHz; note 3 Spice simulation model 6.7 dBm actual printed-circuit board 2 dBm Notes 1. The circuit is stable for all frequencies. 2. The noise figure performance of the actual printed-circuit board is about 0.3 dB lower than the performance of the simulation model. The difference is caused by the fact that the Spice model of the BFG540W/X is not optimized for noise. 3. The IP3i performance of the actual printed-circuit board is about 4 dBm lower than the performance of the simulation model. The difference is caused by the fact that the Spice model of the BFG540W/X is not optimized for IP3i. 1999 Dec 22 6,

NOTES

1999 Dec 22 7,

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