Download: RF COMMUNICATIONS PRODUCTS AN1892 SA900 I/Q transmit modulator for 1GHz applications Wing S. Djen 1997 Aug 20 Philips Semiconductors
RF COMMUNICATIONS PRODUCTS AN1892 SA900 I/Q transmit modulator for 1GHz applications Wing S. Djen 1997 Aug 20 Philips Semiconductors Author: Wing S. Djen INTRODUCTION s(t) A(t) cos [ct (t)] (EQ. 1) The SA900 (Figure 1) is a truly universal in-phase and quadrature (I/Q) radio transmitter that can perform many types of analog and where A(t) is the signal envelope and φ(t) is the phase. By using the digital modulation including AM, FM, SSB, QAM, BPSK, QPSK, trigonometric identities, we can represent EQ. 1 in rectangular form FSK, etc. It is a highly integrated system which saves space and by co...
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RF COMMUNICATIONS PRODUCTS
AN1892 SA900 I/Q transmit modulator for 1GHz
applications Wing S. Djen 1997 Aug 20 Philips Semiconductors,Author: Wing S. Djen INTRODUCTION s(t) A(t) cos [ct (t)] (EQ. 1)
The SA900 (Figure 1) is a truly universal in-phase and quadrature (I/Q) radio transmitter that can perform many types of analog and where A(t) is the signal envelope and φ(t) is the phase. By using the digital modulation including AM, FM, SSB, QAM, BPSK, QPSK, trigonometric identities, we can represent EQ. 1 in rectangular form FSK, etc. It is a highly integrated system which saves space and by cost for the manufacturers producing cellular and wireless products. The device allows baseband signals to directly modulate the I/Q s(t) I(t) cos [ct] Q(t) sin [ct] , (EQ. 2) carriers, which are generated by internal phase shift network, in the I(t) = A(t)cos[φ(t)] 1GHz range, and to maintain good linearity required for linear Q(t) = A(t)sin[φ(t)] modulation scheme (e.g., π/4-DQPSK). It contains an on-chip frequency divider, phase detector, and VCO, which can be built into Since the baseband signals I(t) and Q(t) modulate two exactly 90° a phase-locked loop (PLL) frequency synthesizer to create a out-of-phase carriers cos(wct) and -sin(wct) respectively, we call the transmit offset frequency. Its unique internal design allows system implementing EQ. 2 an in-phase and quadrature (I/Q) frequency conversion without having an external image rejection modulator. Figure 2 shows the mathematics and hardware filter for eliminating the sum term after mixing. The SA900 meets implementation of an I/Q modulator. the specifications required by the IS-54, the industry standard for North America Digital Cellular (NADC) system. This application The local oscillator, usually a VCO within a PLL, generates the note reviews the basic concept of I/Q modulation and discusses the carrier and is split into two equal signals. One goes directly into a key points when designing the SA900 for an RF transmitter. double-balanced mixer to form the I-channel and the other one goes into the other mixer via a 90° phase shifter (realized by passive elements) to provide the Q-channel. The baseband signals I(t) and Q(t), either analog or digital in nature, modulate the carrier to produce the I and Q components which are finally combined to form the desired RF transmitting signal. Since any RF signal can beI/Q MODULATION represented in the I/Q form, any modulation scheme can be
Any bandpass RF signals can be represented in polar form by implemented by an I/Q modulator. LO_2 LO_1IIQQTXLO_2 TXLO VGA PA DUALTX LPF LPF TXLO_1 PHASESHIFT
IMAGE NETWORK TANK_1 REJECTVCO MIXER LPF TANK_2VCO
÷N 2 PA AMPSTX ÷ VGAA8/1 AD BIAS CONTROLBG
PHSOUT PHS AD DET SE N<0:1>AD
÷ SM1IPEAK B8/1 AD SM2Y X
XTAL_1XTAL
XTAL_2 OSC ÷3/1 X ÷ 2/1 YSM1 SM2 ÷4/5/1CONTROL LOGIC
CONV2 SM1 SM2 CLK1 CLK2 MCLK CLKSET DATA CLOCK STROBE TXEN SR00937 Figure 1. SA900 Transmit Modulator 1997 Aug 20 8–2, However, unlike the previous case that “11” is always π/4 and “00” is Q(t) always -3π/4, the encoded phases are the degrees that the carrier has to shift at each sampling instances. Thus, the information is A(t) contained in the phase difference (differential) instead of absolute phase for π/4-DQPSK. φ(t) I(t) s(t) A(t) cos [ ct (t) ] Differential Serial Tx Filter I(t) A(t) cos [ (t) ] [ cos ( t) ] NRZ Datac A(t) sin [ (t) ] [ sin(ct)] to Phase Encoder I(t) Q(t) Parallel for I(t) π Tx Filter Q(t) /4-DQPSK cos ( ct ) SR00939 CARRIER Figure 3. QPSK and π/4-DQPSK Baseband GeneratorΣ s(t)
–sin(ct) 90° Tb13679Q(t) SR00938 NRZ Data Time245810 Figure 2. Mathematical Representation and Hardware –1 Implementation of I/Q Modulator I(t) 1379Linear Digital Modulation Time5
Linear digital modulation techniques depend on varying the phase –1 and/or magnitude of an analog carrier according to some digital2xTb = Ts information: ones and zeros. This digital information can be the 1 Q(t) 6 output of an analog-to-digital converter (e.g. voice codec), or it can be digital data in some standard formats (e.g. ASCII). The most Time24810 popular digital signaling format is non return-to-zero (NRZ), where –1 Tb: bit period 1s and 0s are converted into signal with amplitude of 1 and -1, Ts: symbol period respectively, in a symbol duration. Since NRZ signal has infinite SR00940 bandwidth, transmit filters have to be used to limit the spectral Figure 4. Serial-to-Parallel Conversion spreading. To ensure each NRZ symbol does not smear into its neighbors due to low-pass filtering and channel distortion causing inter-symbol interference (ISI), the frequency response of the A better way to tell the difference between QPSK and π/4-DQPSK is low-pass filter has to satisfy Nyquist criteria. One example of this by looking at the signal constellation diagram, shown in Figure 5, type of filter is the linear phase square-root-raised cosine filter. which displays the possible values of I and Q vectors and change of Together with the same type of filter for receive low-pass filtering, states. Constellation diagram is also known as phase diagram the signal is guaranteed ISI free in a Gaussian environment. One because it shows the phase of the carrier at the sampling point. straight-forward technique of transmitting these bandlimited signals Notice that the phases of QPSK are assigned for every two bits of through communication channels would be applying it directly to the data; therefore, it can transmit twice as much information as BPSK mixer of the I-channel to generate the RF signal. This is known as in a given bandwidth, i.e., more bandwidth efficient. 8-PSK is binary phase shift keying (BPSK), where the phase of the carrier is another type of modulation used for high efficiency requirements. It shifted 180° to transmit a data change from 0 to 1 or 1 to 0. maps three bits into 8 phases, 45° apart, in the constellation. More spectral efficient modulation can be created by mapping more bits Quadrature or quaternary phase shift keying (QPSK) is a much into one phase at each sampling point. However, as you put more more common type of modulation scheme used in mobile and dots in the signal constellation, the signal susceptibility to noise is satellite communications. It has four possible states (90° apart) and lower because the decision distance is shorter (dots are closer). each of them represents two bits of data. Figure 3 shows the Then, it requires higher carrier-to-noise (C/N) ratio to maintain the baseband generator for QPSK (without the differential phase same bit error rate (BER). encoder). NRZ data bits go through the serial-to-parallel converter (see Figure 4) and are mapped in accordance to some rules to One common misconception is that since π/4-DQPSK has 8 states generate I and Q values. The generic rule will be the values of I in the constellation, it is just another type of 8-PSK. Notice that at and Q components are 1 and 1 for the data bits “11” (45°) and -1 every sampling instant, the carrier of π/4-DQPSK is only allowed to and -1 for the data bits “00” (-135°). These discrete signals have to switch to one of the 4 possible states (see Figure 5). So, we still be bandlimited by Nyquist low-pass filters to be ISI free. have two data bits which get encoded into 4 phases. Thus, it has the same spectral efficiency as QPSK for the same carrier power. A more sophisticated way of mapping results in π/4-DQPSK (D for The reason for using this modulation scheme is twofold. First, the differential encoding), which is chosen for North America Digital envelope fluctuation, which causes spectral spreading due to Cellular (IS-54), Personal Digital Cellular (PDC) in Japan, and nonlinearity of transmitter and amplifier, is reduced because the Personal Handy Phone System (PHS) in Japan. In this scheme, maximum phase shift is 135° instead of 180°. Second, the signal consecutive pairs of bits are encoded into one of the four possible can be demodulated non-coherently which simplifies the receiver phases: π/4 for “11”, 3π/4 for “01”, -3π/4 for “00”, and -π/4 for “10”. circuitry by eliminating the need for carrier recovery. 1997 Aug 20 8–3, Q Q only one sideband is needed to deliver the information. The 01 11 SSB-AM can be generated by an I/Q modulator with the baseband00 10 information feeding the modulator (by quadrature), as shown in 01 11 Figure 7. This modulation technique can greatly reduce the bandwidth of the signal and allows more signals to be transmitted inIIagiven frequency band. This topic is discussed in detail in Philips RF application note, #AN1981, “New low-power single sideband circuits”. 00 10 AUDIO I(t) SR00941 SIGNAL Figure 5. Signal Constellation of QPSK and π/4-DQPSK 90° Q(t) SR00943Digital and Analog FM Figure 7. Baseband Processing for SSB-AM
Another family of digital modulation is categorized by frequency change of the carrier instead of phase and/or amplitude change. SYSTEM ARCHITECTURE One of them is frequency shift keying (FSK), where the carrier There are usually two schemes, the dual conversion and direct switches between two frequencies. FSK is also known as digital FM conversion, used for implementing transmit modulators. Dual because it can be generated by feeding the NRZ data stream into an conversion is simpler to implement by modulating an oscillator at analog VCO. FSK appears as a unit circle in the signal constellation lower frequency and then up-converting to the carrier frequency. because the RF signal envelope is constant and the phase is This scheme, however, is more expensive due to the need for continuous. Baseband filtering is usually applied for FSK to limit the additional filtering and more PC board space. By using only one RF bandwidth of the signal so that more channels can fit into a given mixer, direct conversion requires fewer components but is harder to frequency band. implement. One common modulation of this type is known as Gaussian The problems that direct conversion suffers are carrier leakage and minimum shift keying (GMSK), which is used for GSM and some modulated signal coupling. Poor RF isolation of the surface mount other wireless applications. GMSK can be generated by following packages will allow the carrier to be present at the transmitter output its definition: bandlimit the NRZ data stream by a Gaussian low-pass thus making it difficult to have -40dBc carrier suppression. In filter, then modulate a VCO with modulation index ( 2 x frequency addition to that, modulated RF signal would couple back to the deviation/bit rate) set to 0.5. In other words, the single-sided oscillator (usually a VCO in a PLL synthesizer loop) and cause frequency deviation is one fourth of the bit rate (∆f = R/4). modulation distortion. Another way of generating GMSK is by I/Q modulator. Referring Based on the concept of dual conversion, the SA900 uses an image back to EQ. 2, any RF signal can be split into I and Q components. rejection mixer to eliminate the need for IF filtering and allow Unlike the QPSK mentioned before, baseband I(t) and Q(t) are not monolithic integration. The transmit carrier (LO) is down-converted discrete points for FM signals; rather, they are continuous functions by the frequency synthesized by the on-chip VCO, which operates of time. The way to produce FM is shown in Figure 6. We first store from 90 to 140MHz. This LO is then modulated by the baseband I/Q all the possible values of cos[φ(t)] and sin[φ(t)] in a ROM lookup signals to obtain a complex modulation scheme. The image (sum table, which will be addressed by the incoming data to generate the I term) after mixing and LO is sufficiently suppressed by the image and Q samples. The output data from the ROM is then applied to rejection mixer. Any residual amounts can be further suppressed by D/A converters, after low-pass filtering for signal smoothing, to an external duplex filter. produce the analog baseband I and Q signals. This method guarantees the modulation index to be exactly 0.5, which is required Figures 8 and 9, respectively, show how the SA900 can be used in for coherent detection of GMSK (e.g. GSM system). The same I/Q frequency division duplex (FDD) and time division duplex (TDD) principle can also be applied to generating analog FM signals. transceivers. Notice that the LO for both systems is running at a frequency which is higher than the transmit frequency, thus cos ( t ) Lowpass minimizing carrier leakage. In the FDD system only one externalc NRZ Address DAC I(t) ROM Filter VCO is required for generating both transmit and receive LO when Generating Logic sin(ct) DAC Lowpass using the SA900. ROM Filter Q(t) SR00942 Figure 10 shows the IS-54 front-end chip set which consists of the SA601, SA7025, SA900, and SA637. This receiver architecture Figure 6. Digital FM (e.g. GMSK) Baseband I/Q Generator (SA637) supports a digital magnitude/phase baseband demodulator. An alternate configuration will be using the SA606 FM/IF receiver inSingle sideband AM (SSB-AM) conjunction with an external I/Q demodulator IC. The following table
AM signals can be divided into 3 types: the conventional AM, double shows the possible configurations for the IS-54 handsets using the sideband suppressed carrier AM (DSB-AM) and SSB-AM. The first SA900 as transmitters. type is not attractive because for 100% modulation, two-thirds of the Rx 1st IF On-Chip VCO On-Chip ÷N Crystal transmit signal power appears in the carrier, which itself conveys no Frequency Value Frequency information at all. By using a balanced mixer (e.g. Gilbert cell), one 83.16MHz 128.16MHz 6 21.36MHz can generate DSB-AM, where the carrier is totally suppressed and 71.64MHz 116.64MHz 6 19.44MHz only the upper and lower sidebands are present. However, this is still not the best because the information is transmitted twice, once 45MHz 90MHz 6 15MHz in each sideband. To further increase the efficiency of transmission, 84.6MHz 129.6MHz 9 14.4MHz 1997 Aug 20 8–4, 881 IF = 83.16 915 IF = 45BPF BPF LO = 964.16 LO = 960SWITCHDPLX
836 Σ 915 Σ 90° 90° VCO = 128.16 VCO = 45IQSR00944IQSR00945 Figure 8. FDD System Using SA900 Figure 9. TDD System Using SA900 881MHz 450kHz 450kHz 881MHz 83.16MHz MIXER IF LIMITERAMPLNA SA601 TO DSPFAST RSSI
VCO SA637 VCO 82.71MHz CH 1. Rx 870.03MHz 953.19MHzDUP
SERIAL INPUT + PROG LATCHMICROCONTROLLER
INTERFACE MAIN÷3971 5/8 CH 1. TxIQ953.19MHz825.030MHz MAINSA7025 PHASE 836MHz DET. PA PHASE REF ÷89 VGA SHIFT 836MHz BUFFER NTWK AUXPHASE
÷6 128.16MHz DET. PHA VGA SA900 AUX ÷2757CONTROL
21.36MHz SERIAL INPUT FREQUENCY PLAN (EXAMPLE ONLY) 1st LO = 953.19MHz (870.03 + 83.16MHz) CHANNEL 1 CLK MICRO DSP SET CLK CLK 2nd LO = 82.71MHz (83.16MHz - 450kHz) REFERENCE = 21.36MHz SR00946 Figure 10. IS-54 front-end chip set from PhilipsDESIGNING WITH THE SA900 amplitude. Single-ended I and Q sources can be used but are not
recommended due to the degradation in carrier suppression (moreBaseband I/Q Inputs than 10dB compared to differential). In addition, the entire noise
The baseband modulation inputs are designed to be driven performance of the device will suffer. VCC /2 should be applied to I2 differentially for the SA900 to operate at its best. The I and Q inputs and Q2 pins if the part is driven single-endedly. should have a DC offset of VCC /2, which is externally provided by common DSP chips. If all four inputs are biased from the same Transmit Local Oscillator source, the device can tolerate ±0.5VDC error; however, inaccuracy The transmit local oscillator path consists of a TXLO input buffer, LO of DC bias between I1/I2 or Q1/Q2 causes reduced suppression of output buffer, VCO, image rejection mixer and phase shift network. the carrier. Thus, it is important to have a well regulated DC supply Together with a few external components, this section provides the I for I and Q signal biasing. The bandwidth of the inputs is much and Q carrier for modulation. higher than the specified 2MHz. Approximately 2dB of power loss The TXLO inputs and LO outputs are designed to be used in an will be experienced if the I and Q inputs are 50MHz. external PLL which synthesizes different frequencies for channel The SA900 generates a minimum of 0dBm of power to a 50Ω load selection. The RF signal being generated is fed into TXLO inputs when the amplitude of the I and Q signals are 400mVP-P. The and then comes out of LO outputs to complete the system output power will decrease by 6dB for every 50% decrease in I/Q synthesizer loop. The TXLO inputs are differential in nature and 1997 Aug 20 8–5, have a VSWR of 2:1 with input impedance of 50Ω. Single-ended CT = 5.6 + (1/33 + 1/33 + 1/33.5)-1 = 16.7pF sources can be used by AC grounding the TXLO_2, as done on the demoboard. This signal should also be AC coupled into the f 1VCO 123MHz TXLO_1. The frequency range for these inputs is from 900 to 2 (100e-9 16.7e-12)0.5 1040MHz while the input power should be between -10 to -13dBm. On the demoboard, a 1:1 ratio RF transformer is also included to The output level will be changed significantly if the input level is allow single-ended external source driving differential inputs when below -25dBm. the VCO is not used. The output power of the LO buffered signal changes by about 2dB When designing the VCO, careful PCB layout has to be made. when the SA900 is in a different mode of operation. Typical values Traces have to be short to avoid the parasitic capacitance and are -13.5dBm and -15.5dBm for DUAL mode and STANDBY mode, inductance which may cause unwanted oscillation. Referring to EQ. respectively. 3, there is a large combination of L and CT values that will give the same resonant frequency. If undesired spurs are found in the The 90° phase shift network, realized by RC networks, is capable of design due to PCB layout, experimenting with a different set of LC operating over a wide frequency range. Even though their values may sometimes solve the problem. frequency characteristics are optimized for cellular band, the part can also be used in other applications in a different band. In such cases, designers have to test the part experimentally to find out the Output impedance matching performance, such as sideband suppression, carrier suppression, The equivalent output impedance at the DUALTX pin is and image rejection. approximately equal to 600Ω in parallel with 2pF at 830MHz. It has to be matched properly to generate maximum power into a 50Ω loadCrystal Oscillator (e.g. SAW filter). Figure 12 shows the recommended matching
The crystal oscillator (XTAL_1 and XTAL_2 pins) is used to provide network. The shunt inductor (L1) is used to provide maximum swing reference frequency between 10 and 45MHz for the phase detector at the output (short at DC) and also provide reactance to make the and the three on-chip clocks. It can be configured as a crystal real impedance 50Ω looking into the matching network. The oscillator using external crystal and capacitors, or it can be driven by remaining negative reactance is canceled by the series inductor an external source. In the latter case, pin XTAL_2 can be left (L2). The values used on the demoboard can be used as a floating. Information regarding crystal oscillator design can be found reference but may not be suitable if a different layout is in Philips RF application note, #AN 1982, “Apply the Oscillator of the implemented. The two shunt capacitors are included to bypass the SA602 in Low-Power Mixer Applications.” high frequency RF signal, avoiding direct coupling into VCC. The series AC coupling capacitor is used to maintain the proper bias for the output stage. Their values are big enough to be left out inVCO impedance matching calculation.
The VCO, together with the phase detector, the divider and external low-pass filter, can form a PLL for the transmit offset frequency. The VCC image reject mixer down-converts the TXLO signal to the RF carrier 100pF 1nF by the amount of VCO frequency. Thus, the TXLO frequency should L1 be the desired channel frequency plus the IF offset generated by the VCO. Notice that the part will not function if the VCO section is not L2 1000pF used. 34 SA900 The VCO is designed for generating IF frequency between 90MHz TYPICAL VALUES 50Ω and 140MHz. Together with an external varactor diode and L1 = 39nH resonator, it can be configured as an oscillator as shown in Figure L2 = 22nH 11. SR00948 TANK 1 C1 V Figure 12. DUALTX Output Matching Network L CC LPFC3 CV C2 Using a network analyzer to measure the S characteristic is TANK 2 SR00947 necessary for obtaining optimum matching which generates maximum output power. Figure 13a-d shows how to match the Figure 11. VCO Tank Circuit output impedance to a 50Ω load at 915MHz. First, calibrate the network analyzer to the DUALTX SMA connector on the demoboard. The resonant frequency of such a circuit is Then, short the point where the series inductor is located and usef1the DELAY feature of the network analyzer to move the point ofVCO (EQ. 3) 2LCT reference in the Smith Chart to the leftmost point. Now the network analyzer is calibrated to the beginning of the matching network, not where CT = (C1 // C2 // CV) + C3. CV is a varactor diode of which just the SMA connector. The frequency response (Figure 13a) capacitance changes linearly with the voltage across it. shows that the “dip” is around 830MHz, the frequency where the Calculation: board was originally matched. The Smith Chart shows that it C1 = C2 = 33pF requires less inductance to bring the marker to the center of the C3 = 5.6pF chart (50Ω). By using a 15nH series inductor, the “dip” was moved CV = 33.5pF @ 2.5V closer to 915MHz (-15dB) and a better matching is achieved (Figure L = 100nH 13b). 1997 Aug 20 8–6, CH1 CH1 S111UFS 1: 21.021 Ω 25.375 Ω 4.4137 nHS11 log MAG 10dB Ref 0dB 1: –5.8275dB 915.000 000 MHz 915.000 000MHz Cor 1Marker 1 Del 915MHz MARKER 1 915 MHz START 800. 000 000MHz STOP 1 000. 000 000MHz START 800.000 000 MHz STOP 1 000.000 000 MHz a. S11 Response and Smith Chart when L2 = 22nH CH1 S111UFS 1: 35.475 Ω –4.5508 Ω 38.222 pFCH1 S11 log MAG 10dB Ref 0dB 1: –15.011dB 915.000 000 MHz 915.000 000MHz Cor Marker 1 Del 915MHz MARKER 1 915 MHz START 800. 000 000MHz STOP 1 000. 000 000MHz START 800.000 000 MHz STOP 1 000.000 000 MHz b. S11 Response and Smith Chart when L2 = 15nH SR00949 Figure 13.On-Chip Clocks running in AMPS mode, the I/Q modulator, variable gain amplifier
The crystal oscillator is buffered to provide three external clock (VGA) and phase shifter are disabled. The fixed gain amplifier is signals: CLK1, CLK2, and MCLK. Table 1 shows the divide ratio powered up during AMPS mode operation. However, since the and the controlling mechanism: divide ratio is too low (6, 7 or 8), the comparison frequency of the on-board PLL is too high, making it very difficult for the loopTable 1. bandwidth to be less than 300Hz for analog FM modulation.
divide by3X(bit 18) = 1 CLK1 The device includes two power saving modes of operation which divide by1X(bit 18) = 0 disable partial circuitry to reduce the power consumption of the divide by2Y(bit 19) = 1 overall chip. The SLEEP mode disables all the circuitry except the CLK2 divide by1Y(bit 19) = 0 master clock (MCLK pin) of the SA900. The STANDBY mode shuts down everything except the TXLO buffer, MCLK, and CLK1, which divide by 4 CLKSET pin = VCC allows the system synthesizer (e.g. SA7025) to continue running. MCLK divide by 5 CLKSET pin = VCC/2 These two power saving modes are common to both AMPS and divide by 1 CLKSET pin grounded DUAL mode operation. The SA900 draws 60mA in DUAL mode, reduced to 3mA and 8mA, respectively, in SLEEP and STANDBY CLK1 is usually used for the system synthesizer (e.g. SA7025) modes. reference. Since MCLK is active all the time, it is ideal for providing the master clock for the microcontroller. When the device is in TXEN pin is for hardware powering down the modulator and STANDBY mode, CLK1 and MCLK provide the clock signals synthesizer. The falling edge of the signal disables the modulator necessary for receiving RF signals. CLK2 can also be used as a and synthesizer while the rising edge enables the modulator. To clock for digital signal processing (DSP) chip. power down the synthesizer using software, send a data word with SE bit set to ‘0’ (‘1’ for enable). The synthesizer will be disabledModes of Operation right after the strobe signal is transmitted. Either SE or TXEN going
The SA900 is intended for either AMPS mode (analog cellular) or low will turn off the synthesizer. This operation is common to both DUAL mode (digital cellular, IS-54) operation. When the device is AMPS and DUAL mode. 1997 Aug 20 8–7, POWER SUPPLY PIN 40 Q2=400mVP-P, DC=VCC/2 at 200kHz, Phase=180° Quadrature modulation: 5V 5V + – + – PIN 43 I1=400mVP-P, DC=VCC/2 at 200kHz, Phase=0° PIN 42 I2=400mVP-P, DC=VCC/2 at 200kHz, Phase=180° INPHASE QUADRATURE XTAL TXLO PIN 41 Q1=400mVP-P, DC=VCC/2 at 200kHz, Phase=90° IBM I1 PC PIN 40 Q2=400mVP-P, DC=VCC/2 at 200kHz, Phase=270° I2 Figures 15a and 15b illustrate what the typical output spectrum 3-WIRE BUS INTERFACE would be if in-phase and quadrature modulation were applied to an Q1 I/Q modulator. Quadrature modulation will produce lower sideband SA900 (LSB) or upper sideband (USB) signal, depending on the phase DEMO Q2 angle between the I and Q signals. The SA900 was designed to BOARD DUALTX have USB suppressed when the I signal is leading the Q signal. The SR00950 undesired signals are carrier breakthrough and the harmonic Figure 14. In-phase and Quadrature Modulation Test products of the baseband modulating signals sitting at fc ±nfmod, where n is an integer ≥2. Referring to Figure 15a, the output power is 1.3dBm (cable loss =PERFORMANCE OF THE SA900 0.7dB) for the LSB while better than -38dBc of carrier, sideband, and
harmonics suppression is measured. The USB better than -26dBcPerformance Criteria implies the residual AM of the transmit signal is better than 5%, a
Since the I/Q modulator is a universal transmitter, measuring only requirement of the IS-54 specification. the frequency stability and modulation index of a generated FM MKR 835.789MHz signal would not be useful for other modulation schemes. Ref 0dB ATTEN 10dB .60dBm Measurement parameters should be general enough so that they can represent the performance of modulators when applying 10dB/ different types of modulation and allow fair comparisons among Marker different I/Q modulators. Based on this idea, two measurement 835.789MHz techniques, in-phase modulation and quadrature modulation, are .60dBm used for evaluating I/Q modulators. The in-phase modulation relies on injecting two equal frequencies and phase signals at fmod into the I and Q inputs. The result of this modulation is two sidebands appearing at fmod offset from the carrier, with the carrier totally suppressed. This is also known as double-sideband (DSB) conversion. The quadrature modulation requires two equal frequencies (but 90° out-of-phase signals) being CENTER 835.789MHz VBW 300Hz SPAN 2.000MHz injected into the I and Q inputs. The result is a single-sideband RES BW 10kHz SWP 1.5 sec suppressed carrier (SSB-SC) signal with either the upper or lower a. Quadrature Test (SSB Up-conversion) sideband at fmod carrier offset being suppressed. This is also known MKR 835.792MHz as single-sideband (SSB) up-conversion. Figure 14 summarizes Ref 0dB ATTEN 10dB –2.30dBm these two tests. 10dB/ In a practical system, imperfection of an I/Q modulator is directly related to these two measurements. Sideband and carrier Marker suppression from the quadrature modulation test will show the 835.792MHz amount of gain imbalance, phase imbalance, and DC offset. On the –2.30dBm other hand, intermodulation product suppression from the in-phase modulation test will show the linearity of an I/Q modulator. When making measurements, it is important to have well-balanced I and Q baseband modulating signals for measurement since the signal imperfection will translate into degradation in sideband and carrier suppression.Performance Graphs CENTER 836.000MHz VBW 300Hz SPAN 2.000MHz
RES BW 10kHz SWP 1.5 sec In making those measurements for the demoboard, the following b. In-phase Test (DSB Up-conversion) parameters were used: SR00951 Figure 15. In-phase modulation: PIN 43 I1=400mVP-P, DC=VCC/2 at 200kHz, Phase=0° In-phase modulation test will generate both LSB and USB. Beside PIN 42 I2=400mVP-P, DC=VCC/2 at 200kHz, Phase=180° these two tones, the carrier breakthrough and the harmonics, intermodulation (IM) products will all appear at the output. The odd PIN 41 Q1=400mVP-P, DC=VCC/2 at 200kHz, Phase=0° IM products are dominant, and they satisfy the following rules: 1997 Aug 20 8–8, Let f1 = fc - fmod, f2 = fc + fmod Res Bw 2.4kHz [3dB] Vid Bw 3kHz Ref Lvl Delta -54.01dB Tg Lvl Off RF Att 30dBCf Stp 24.000kHz 3rd order IM: 2f1 - f2 = fc - 3fmod, 2f2 - f1 = fc + 3fmod 0dBm 30.1kHz Unit [dBm] 5th order IM: 3f1 - 2f2 = fc - 5fmod, 3f2 - 2f1 = fc + 5fmod 0 7th order IM: 4f1 - 3f2 = fc - 7fmod, 4f2 - 3f1 = fc + 7fmod –10.0 –20.0 Referring to Figure 15b, both LSB and USB are -1.6dBm (cable loss –30.0 = 0.7dB) in power, which is 3dB less than the measured power for –40.0 the quadrature modulation test. The IM3 is better than -35dBc. Much higher order IM products are totally suppressed. –50.0 –60.0 –70.0Amplitude and phase unbalance
–80.0 Both amplitude and phase unbalance (error) of an I/Q modulator can be calculated directly from the SSB performance plots. Assume –90.0 phase error equals φ radian and amplitude error equals K, the –100.0START SPAN CENTER SWEEP STOP sideband suppression, X, in dBc can be expressed as follows (see 829.88 MHz 240 kHz 830 kHz 140 ms 830.12 MHz APPENDIX for derivation): a. Power Spectrum of ADC Modulation Bit rate = 48.6 kb/s; α = 0.35 SSB suppression, X(dBc) (EQ. 4) Res Bw 2.4kHz [3dB] Vid Bw 3kHzK
22Kcos() 1 Ref Lvl Delta -59.62dB Tg Lvl Off RF Att 30dB 10 log K2 – 2 K cos( ) 1 0dBm 25.0kHz Cf Stp 25.000kHz Unit [dBm] –10.0 Collecting the like terms and express φ in terms of K and X, it –20.0 becomes: –30.0 10x10 K2 10x10 1 K2 –40.01 cos (EQ. 5) 2K2K10x10 –50.0 –60.0 For a given X, there will be a set of φ and K that satisfies EQ. 5. We –70.0 can represent this relationship graphically, as shown in Figure 16. –80.0 The contours show the phase and amplitude errors for SSB –90.0 suppression, X, from -44 to -26dBc. When X equals -40dBc, phase –100.0 error is less than 1.2° with a 0dB amplitude error. By the same START SPAN CENTER SWEEP STOP 949.875 MHz 250 kHz 950 MHz 140 ms 950.125 MHz token, the amplitude error is less than 0.2dB with a 0° phase error. b. Power Spectrum of PDC Modulation Bit rate = 42 kb/s; α = 0.5 6 Res Bw 10.0kHz [3dB] Vid Bw 3kHz Ref Lvl Delta -46.70dB Tg Lvl Off RF Att 30dB 0dBm 199.9kHz Cf Stp 100.000kHz 5 Unit [dBm]0 –10.0 28 –20.0 3 30 –30.0 32 –40.0 2 34 –50.0 38 –60.0 1 40 42 –70.0 –80.0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 –90.0 GAIN ERROR (dB) –100.0SR00952 START SPAN CENTER SWEEP STOP 899.505555 MHz 1 MHz 900.005555 MHz 140 ms 900.505555 MHz Figure 16. SSB Suppression Contours c. Power Spectrum of GSM Modulation Bit rate = 270.833 kb/s; BTb = 0.3 SR00953Spectral mask Figure 17.
To fully characterize the performance of an I/Q modulator, measurements of the power spectral density of various digital GMSK is a digital modulation scheme widely used for wireless and modulation schemes have to be made. Figures 17a and 17b show mobile communications. Figure 17c shows the spectral mask of the the measured spectral masks of IS-54 and PDC standards, which modulation format required by GSM, the digital cellular standard in designate π/4-DQPSK as the modulation format. Europe. At 200kHz and 300kHz carrier offset, the power of the 1997 Aug 20 8–9 PHASE ERROR (DEG), signal is suppressed by 46dB and 58dB, respectively, which is well R262 - current setting resistor for the charge pump within the GSM specification. R264, R266 - part of the PLL low-pass filterPower ON time R274 - jumper
The power ON time for the SA900 is mainly determined by the loop MKR ∆ 45.2MHz bandwidth of the on-board PLL frequency synthesizer. It can be Ref 0dB ATTEN 10dB –36.30dBm measured by using the HP 53310A Modulation Domain Analyzer set 10dB/ to the EXTERNAL TRIGGERED mode. The STROBE signal from Marker 45.2MHz 3-wire bus is used to trigger the equipment. Figure 18 shows that –36.30dBm the part can be powered up and locked in about 62µs. hp Freq C tlk only VERTICAL waiting for trigger Center/ Top/ 830.22563MHz Span Bottom Center 830.20063MHz Span 50.00kHz 830.20063MHz 6.25kHz/div CENTER 901.7MHz VBW 10kHz SPAN 200.0MHz RES BW 1MHz SWP 50 msec a. TXLO = 947MHz, VCO = 45MHz MKR ∆ 45.4MHz 830.17563MHz Ref 0dB ATTEN 10dB 0.00s 100.0µs200.00µsFind Center –39.10dBm 20.00 µ s/div 10dB/ T1 0.00s T2 61.78µs∆ 61.78µsMarker Find Center And Span 45.4MHz ref int –39.10dBm SR00954 Figure 18. Power ON Time MeasurementISM band application
The FCC has recently assigned three bands for ISM type of application. The one below 1GHz is from 902 to 928MHz. This band becomes very attractive because users are allowed, without having a license, to transmit up to 1 Watt of power when frequency CENTER 927.6MHz VBW 10kHz SPAN 200.0MHz hopping or direct sequence CDMA is used. The wide bandwidth RES BW 1MHz SWP 50 msec nature of the SA900 fits well into this application. Figures 19a and b. TXLO = 973MHz, VCO = 45MHz SR00955 19b are the output spectrum of the SA900 showing how well the image reject mixer works. A common IF (45MHz) was chosen to be Figure 19. Output Spectrum of the SA900 in the ISM Band the offset frequency, and then injected externally into the VCO pins. The closest images are sitting at 45MHz apart and are better than R349, R350 - make up a voltage divider for selecting divide ratio of -36dBc. the MCLK R352 - termination resistor R333, 358 - isolation resistors between the LC tank and the PLLCOMPONENTS FUNCTION low-pass filter
C241, C242, C243, C245, C246 - Supply bypassing capacitors C247 - provides AC ground for TXLO2 pin FREQUENTLY ASKED QUESTIONS C249 - AC couples an external signal into TXLO1 pin Q. What is the bandwidth of the phase shifter for generating I/Q carriers? C253, C254, C255 - part of the LC tank circuit A. The bandwidth is between 820 and 920MHz. The part is still C263 - AC couples an external signal into XTAL1 pin functional below 820MHz and above 920MHz, but the carrier and C267, C269 - part of the PLL low-pass filter sideband suppression are not guaranteed. In addition, the DUALTX output matching network needs to be optimized for a C281, C287, C288 - AC coupling capacitors for the clocks different frequency. C301 - AC coupling capacitor for the DUALTX pin C305, C306 - Bypass RF signal coming from DUALTX pin Q. Can I frequency modulate (FM) the on-board VCO to generate RF signal for AMPS system? C312, C313, C314 - AC coupling capacitors A. Since the divide ratio for the VCO is too low, it is very difficult to C370, C371 - AC couples an external signal into TANK1 and TANK2 obtain the required loop bandwidth (<300Hz) to do AMPS pins when on-board PLL is not used modulation. L252 - part of the LC tank circuit Q. What signals constitute the spurious output referred to under the L304, L372 - matching network for the DUALTX output DUALTX function of the AC electrical characteristics in the data R260 - termination resistor sheet? 1997 Aug 20 8–10, A. Those spurs could be N*TXLO, N*VCO, TXLO+VCO, N*XO, and wm. Then the signal, s(t), at the output of the I/Q modulator TXLO ±N*VCO. becomes, s(t) K cos(ct )cos(mt) sin(ct) cos(mt 90o) Q. Can external circuitry be added or modified to reduce the (EQ. A.1) broadband noise floor below -136dBm/Hz? Using trigonometric identity and let ωc - ω = A and ω + ω = B, A. Customers can put a bandpass SAW filter at the output of themcmwe obtain, TXLO to improve the broadband noise floor. s(t) K cos[At ] K cos[Bt 1 ] cos[At] 1 cos[Bt] Q. Can the SA900 generate BPSK signal? 2222A. Yes, it can. Feed the baseband signal into I1 and I2 and leave (EQ. A.2) Q1 and Q2 open or tie them to VCC /2. Assume the information is in LSB, i.e. A, and the spur is the USB, i.e., B, we have, Q. What is the response of the image rejection filter? K1KA. It is actually a SSB mixer; not an image rejection filter. Signal cos A cos cos A sin A sin222(EQ. A.3) Q. What happens if the VCO is not used? A. There will not be any signal at the DUALTX and AMPS output if Noise K cos B cos 1 cos B – K sin B sin222the VCO is not used. (EQ. A.4) To find the power, we have to evaluate the envelope (amplitude) ofREFERENCES: these two signals. Recall that for any given bandpass signal in
“Implementation of a 900 MHz Transmitter System Using Highly rectangular form, Integrated ASIC”, Wing S. Djen and Prasanna M. Shah, Bandpass signal = X cos ωt - Y sin ωt, Proceedings of the 44th IEEE Vehicular Technology Conference, June 1994, pp. 1341-1345. the envelope is “Digital and Analog Communications Systems,” Leon W. Couch II, Envelope = ( X2 + Y2 )0.5 Macmillan, 1990. Therefore, from EQ. A.3 and A.4, “Cellular System Dual-Mode Mobile Station-Base Station Compatibility Standard”, IS-54-B, EIA/TIA, April 1992. 0.522K1K“Physical Layer on the Radio-Path”, GSM Standard, July 1988. Signal cos sin222π(EQ. A.5)“ /4-QPSK MODEMS for Satellite Sound/Data Broadcast Systems”, Chia-Liang Liu and Kamilo Feher, IEEE Transactions on 0.5 Broadcasting, March 1991, pp. 1-8. 2 2 Noise K cos – 1 K sin “PCD5070 GSM Baseband Interface”, Preliminary specification, 222Philips Semiconductors, September, 1992. (EQ. A.6) Finally, the S/N ratio can be found by taking 20 log the ratio of EQ. A.5 and A.6.APPENDIX
K2 2K cos 1 Assume an imperfect I/Q modulator with gain error, K, and phase S 10 log error, φ, modulated by quadrature I/Q signals (SSB up-conversion) N K 2K cos 1 1997 Aug 20 8–11, NOTE: VCO-REF circuit is optional L372 is C307 on the PCB C246 combines C240 and C244 on the PCB SR00956Figure 20. SA900 Demoboard
1997 Aug 20 8–12 J8 LO2PS1 W1 C31312100pF ZO=50 J7 J6C314 I1 LO2PS212100pF ZO=50 J5 I2 W2 J4 Vcc Q1 + J3 P1-1,2,3 C246 Q2 4.7uFGND
U1444444444333P1-4,5,6,11,12,13 C247 SA900BE876543210987C241 C305 C306 J1 100pFVLLGVIIQQGVG100PF 100pF .010uF TXLO2 W3cOONc1212NcN1ZO=502c21DcDcDC249 L304 VCO-TUNE C254 100pF 1 36 39nHGND Vcc C301 J9 P1-15 33pF 2 35 100pF W4 DIGTXRF JP4 3 TXLO2 GND124TXLO1 DUALTX 34 ZO=50 JMP GND GND 33 L372 R258 5 32 PHS-OUT Vcc Vcc 22nH1k 6 31 P1-14 L252 7 TANK1 AMPSTX J10 JP5 D1 100nH 8 TANK2 GND 30 C312 29 100pF W5 AMPSTXRFVcc Vcc JMP KV147091210 PHS OUT GND 27 ZO=50 R333 IPEAK VccC253 11 26 1k 12 GND VccXTAL1 25C S GND R264 C255 5.6pF 1k 33pFXLCTR262TCCMKDLRTC300 15kAVLGLGCSAOOX.010uFLcKNKNLETCBEC269 R2661c1D2DKTAKEN33pF 560 R268 C242 C243111111122222C245100pF 100pF345678901234.010uFNL C265 C267 NL 220pF J18 VCO-REF JP1 JMP R349 C370 100k100pF R279 JP2 JMPNL
T1-1 R352 JP3 JMP KK81 100 C371 C299 R350 100pF NL C288 L296 100k P1-7 .010uF NL C295 DATANL
P1-8 J2 C263 C281 C294 CLOCK XO-REF R274 .01uF .010uF C287 NL R297 0 .010uF NL P1-9STROBE P4 P1-10C283 R260 L280 L290NL MCLK TXENABLE 51 R284 NL R293 C292NL
NL NLNL CLK1 C282 NL C289NL
CLK1, SR00957 Figure 21. SA900 Board Layout 1997 Aug 20 8–13,Table 2. Customer Application Component List for SA900BE
Qty. Part Value Volt Part Reference Part Description Vendor Mfg Part Number Surface Mount Capacitors 1 5.6pF 50V C253 Cap. cer. 0603 NPO ±0.25pF Garrett Rohm MCH185A5R6CK 3 33pF 50V C254, C255, C269 Cap. cer. 0603 NPO ±5% Garrett Rohm MCH185A330JK C241, C242, C243, C247, 13 100pF 50V C249, C300, C301, C305,C312, C313, C314, C370, Cap. cer. 0603 NPO ±5% Garrett Rohm MCH185A101JK C371 1 1000pF 50V C301 Cap. cer. 0603 X7R ±10% Garrett Rohm MCH185C102KK 1 2200pF 50V C267 Cap. cer. 0603 X7R ±10% Garrett Rohm MCH185C222KK 6 0.01µF 25V C245, C263, C281, C287,C288, C306 Cap. cer. 0603 X7R ±10% Garrett Philips MCH182C103KK 1 4.7µF 10V C246 Tant. chip cap. B 3528 ±10% Garrett Philips 49MC475B010KOAS 8 NL C265, C282, C283, C289,C292, C294, C295, C299 Surface Mount Resistors 1 0Ω R274 Res. chip 0603 1/16W ±5% Garrett Rohm MCR03JW000E 1 51Ω R260 Res. chip 0603 1/16W ±5% Garrett Rohm MCR03JW510E 1 100Ω R352 Res. chip 0603 1/16W ±5% Garrett Rohm MCR03JW101E 1 560Ω R266 Res. chip 0603 1/16W ±5% Garrett Rohm MCR03JW561E 1 1KΩ R258, R264, R333 Res. chip 0603 1/16W ±5% Garrett Rohm MCR03JW102E 1 15KΩ R262 Res. chip 0603 1/16W ±5% Garrett Rohm MCR03JW153E 2 100KΩ R349, R350 Res. chip 0603 1/16W ±5% Garrett Rohm MCR03JW104E Surface Mount Diodes 1 D1 SMD Diode (Varactor) Digikey TOKO KV1470TR00 Surface Mount Inductors 1 0.022µH L372 Inductor SM Mold/WW A Garrett J.W. Miller PM20-R022M 1 0.039µH L304 Inductor SM Mold/WW A Garrett J.W. Miller PM20-R039M 1 0.10µH L252 Inductor SM Mold/WW A Garrett J.W. Miller PM20-R10M Surface Mount Integrated Circuits 1 U1 I/Q Transmit modulator Philips Philips SA900BE Miscellaneous 1 K353 RF Transformer Mini- Mini-Circuits Circuits T1-1 KK81 11 J1, J2, J3, J4, J5, J6, J7, SMA Right Angle JackJ8 ,J9, J10, J18 Receptacle Newark EF Johnson 142-0701-301 5 JP1, JP2, JP3, JP4, JP5 straight, dual row Newark IPI 929836-01-36-ND 1 P1 15 pins receptacle D-sub. conn. Newark Dupont 51F2456 1 Printed circuit board Philips Philips SA900-30021 66 Total Parts 1997 Aug 20 8–14]15
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