Download: RF Wideband Transistors General section
QUALITY • Acceptance tests on finished products to verify conformance with the device specification. The test Total Quality Management results are used for quality feedback and corrective Philips Semiconductors is a Quality Company, renowned actions. The inspection and test requirements are for the high quality of our products and service. We keep detailed in the general quality specifications. alive this tradition by constantly aiming towards one • Periodic inspections to monitor and measure the ultimate standard, that of zero defects. This aim is guided conformance of products. by our Total ...
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QUALITY • Acceptance tests on finished products to verify conformance with the device specification. The test Total Quality Management results are used for quality feedback and corrective Philips Semiconductors is a Quality Company, renowned actions. The inspection and test requirements are for the high quality of our products and service. We keep detailed in the general quality specifications. alive this tradition by constantly aiming towards one • Periodic inspections to monitor and measure the ultimate standard, that of zero defects. This aim is guided conformance of products. by our Total Quality Management (TQM) system, the basis of which is described in the following paragraphs. Product reliability QUALITY ASSURANCE With the increasing complexity of Original Equipment Manufacturer (OEM) equipment, component reliability Based on ISO 9000 standards, customer standards such must be extremely high. Our research laboratories and as Ford TQE and IBM MDQ. Our factories are certified to development departments study the failure mechanisms of ISO 9000 by external inspectorates. semiconductors. Their studies result in design rules and process optimization for the highest built-in product PARTNERSHIPS WITH CUSTOMERS reliability. Highly accelerated tests are applied to the PPM co-operations, design-in agreements, ship-to-stock, products reliability evaluation. Rejects from reliability tests just-in-time and self-qualification programmes, and and from customer complaints are submitted to failure application support. analysis, to result in corrective action. PARTNERSHIPS WITH SUPPLIERS Customer responses Ship-to-stock, statistical process control and ISO 9000 Our quality improvement depends on joint action with our audits. customer. We need our customer’s inputs and we invite constructive comments on all aspects of our performance. Q Please contact our local sales representative.UALITY IMPROVEMENT PROGRAMME Continuous process and system improvement, design Recognition improvement, complete use of statistical process control, realization of our final objective of zero defects, and The high quality of our products and services is logistics improvement by ship-to-stock and just-in-time demonstrated by many Quality Awards granted by major agreements. customers and international organizations. Advanced quality planning PRO ELECTRON TYPE NUMBERING SYSTEM During the design and development of new products and Basic type number processes, quality is built-in by advanced quality planning. Through failure-mode-and-effect analysis the critical This type designation code applies to discrete parameters are detected and measures taken to ensure semiconductor devices (not integrated circuits), multiples good performance on these parameters. The capability of of such devices, semiconductor chips and Darlington process steps is also planned in this phase. transistors. Product conformance FIRST LETTER The assurance of product conformance is an integral part The first letter gives information about the material for the of our quality assurance (QA) practice. This is achieved by: active part of the device. • Incoming material management through partnerships A Germanium or other material with a band gap of with suppliers. 0.6 to 1 eV • In-line quality assurance to monitor process B Silicon or other material with a band gap of reproducibility during manufacture and initiate any 1 to 1.3 eV necessary corrective action. Critical process steps are C Gallium arsenide (GaAs) or other material with a 100% under statistical process control. band gap of 1.3 eV or more R Compound materials, e.g. cadmium sulphide. 1997 Nov 26 34, SECOND LETTER Version letter The second letter indicates the function for which the A letter may be added to the basic type number to indicate device is primarily designed. The same letter can be used minor electrical or mechanical variants of the basic type. for multi-chip devices with similar elements. In the following list low power types are defined by RATING SYSTEMS Rth j-mb > 15 K/W and power types by Rth j-mb ≤ 15 K/W. The rating systems described are those recommended by A Diode; signal, low power the IEC in its publication number 134. B Diode; variable capacitance C Transistor; low power, audio frequency Definitions of terms used D Transistor; power, audio frequency ELECTRONIC DEVICE E Diode; tunnel An electronic tube or valve, transistor or other F Transistor; low power, high frequency semiconductor device. This definition excludes inductors, G Multiple of dissimilar devices/miscellaneous capacitors, resistors and similar components. devices; e.g. oscillators. Also with special third letter; see under Section “Serial number” CHARACTERISTIC H Diode; magnetic sensitive A characteristic is an inherent and measurable property of a device. Such a property may be electrical, mechanical, L Transistor; power, high frequency thermal, hydraulic, electro-magnetic or nuclear, and can N Photocoupler be expressed as a value for stated or recognized P Radiation detector; e.g. high sensitivity conditions. A characteristic may also be a set of related photo-transistor; with special third letter values, usually shown in graphical form. Q Radiation generator; e.g. LED, laser; with special third letter BOGEY ELECTRONIC DEVICE R Control or switching device; e.g. thyristor, low An electronic device whose characteristics have the power; with special third letter published nominal values for the type. A bogey electronic S Transistor; low power, switching device for any particular application can be obtained by considering only those characteristics that are directly T Control or switching device; e.g. thyristor, low related to the application. power; with special third letter U Transistor; power, switching RATING W Surface acoustic wave device A value that establishes either a limiting capability oraXDiode; multiplier, e.g. varactor, step recovery limiting condition for an electronic device. It is determined Y Diode; rectifying, booster for specified values of environment and operation, and may be stated in any suitable terms. Limiting conditions Z Diode; voltage reference or regulator, transient may be either maxima or minima. suppressor diode; with special third letter. RATING SYSTEM SERIAL NUMBER The set of principles upon which ratings are established The number comprises three figures running from and which determine their interpretation. The rating 100 to 999 for devices primarily intended for consumer system indicates the division of responsibility between the equipment, or one letter (Z, Y, X, etc.) and two figures device manufacturer and the circuit designer, with the running from 10 to 99 for devices primarily intended for object of ensuring that the working conditions do not industrial or professional equipment.(1) exceed the ratings. Absolute maximum rating system (1) When the supply of these serial numbers is exhausted, the Absolute maximum ratings are limiting values of operating serial number may be expanded to three figures for industrial types and four figures for consumer types. and environmental conditions applicable to any electronic 1997 Nov 26 35, device of a specified type, as defined by its published data, applications, taking responsibility for normal changes in which should not be exceeded under the worst probable operating conditions due to rated supply voltage variation, conditions. equipment component variation, equipment control adjustment, load variation, signal variation, environmental These values are chosen by the device manufacturer to conditions, and variations in the characteristics of all provide acceptable serviceability of the device, taking no electronic devices. responsibility for equipment variations, environmental variations, and the effects of changes in operating The equipment manufacturer should design so that, conditions due to variations in the characteristics of the initially, no design centre value for the intended service is device under consideration and of all other electronic exceeded with a bogey electronic device in equipment devices in the equipment. operating at the stated normal supply voltage. The equipment manufacturer should design so that, initially and throughout the life of the device, no absolute LETTER SYMBOLS maximum value for the intended service is exceeded with any device, under the worst probable operating conditions The letter symbols for transistors detailed in this section with respect to supply voltage variation, equipment are based on IEC publication number 148. component variation, equipment control adjustment, load variations, signal variation, environmental conditions, and Basic letters variations in characteristics of the device under In the representation of currents, voltages and powers, consideration and of all other electronic devices in the lower-case letter symbols are used to indicate all equipment. instantaneous values that vary with time. All other values are represented by upper-case letters. Design maximum rating system Electrical parameters(1) of external circuits and of circuits Design maximum ratings are limiting values of operating in which the device forms only a part are represented by and environmental conditions applicable to a bogey upper-case letters. Lower-case letters are used for the electronic device of a specified type as defined by its representation of electrical parameters inherent in the published data, and should not be exceeded under the device. Inductances and capacitances are always worst probable conditions. represented by upper-case letters. These values are chosen by the device manufacturer to The following is a list of basic letter symbols used with provide acceptable serviceability of the device, taking semiconductor devices: responsibility for the effects of changes in operating B, b Susceptance (imaginary part of an admittance) conditions due to variations in the characteristics of the electronic device under consideration. C Capacitance G, g Conductance (real part of an admittance) The equipment manufacturer should design so that, initially and throughout the life of the device, no design H, h Hybrid parameter maximum value for the intended service is exceeded with I, i Current a bogey electronic device, under the worst probable L Inductance operating conditions with respect to supply voltage variation, equipment component variation, variation in P, p Power characteristics of all other devices in the equipment, R, r Resistance (real part of an impedance) equipment control adjustment, load variation, signal V, v Voltage variation and environmental conditions. X, x Reactance (imaginary part of an impedance) Design centre rating system Y, y Admittance Design centre ratings are limiting values of operating and Z, z Impedance. environmental conditions applicable to a bogey electronic device of a specified type as defined by its published data, and should not be exceeded under normal conditions. (1) For the purpose of this publication, the term ‘electrical parameters’ applies to four-pole matrix parameters, elements These values are chosen by the device manufacturer to of electrical equivalent circuits, electrical impedances and provide acceptable serviceability of the device in average admittances, inductances and capacitances. 1997 Nov 26 36, Subscripts repetitive, recovery. As third subscript: with a specified resistance between the terminal Upper-case subscripts are used for the indication of: not mentioned and the reference terminal • Continuous (DC) values (without signal), e.g. ID, IB (OV) Overload • Instantaneous total values, e.g. iD, iB P, p Pulse • Average total values, e.g. ID(AV), IB(AV) Q, q Turn-off • Peak total values, e.g. IDM, IBM R, r As first subscript: reverse (or reverse • Root-mean-square total values, e.g. ID(RMS); IB(RMS). transfer), rise. As second subscript: Lower-case subscripts are used for the indication of values repetitive, recovery. As third subscript: with a applying to the varying component alone: specified resistance between the terminal not mentioned and the reference terminal • Instantaneous values, e.g. ib (RMS), (rms) Root-mean-square value • Root-mean-square values, e.g. Id(rms) S, s As first subscript: series, source, storage, • Peak values, e.g. Ibm stray, switching. As second subscript: surge • Average values, e.g. Id(av). (non-repetitive). As third subscript: short The following is a list of subscripts used with basic letter circuit between the terminal not mentioned symbols for semiconductor devices: and the reference terminal A, a anode stg Storage amb ambient th Thermal (AV), (av) average value TO Threshold B, b base tot Total (BO) breakover W Working (BR) breakdown X, x Specified circuit case case Z, z Reference or regulator (zener) C, c collector 1 Input (four-pole matrix) C controllable 2 Output (four-pole matrix). D, d drain Applications and examples E, e emitter TRANSISTOR CURRENTS F, f fall, forward (or forward transfer) The first subscript indicates the terminal carrying the G, g gate current (conventional current flow from the external circuit H holding into the terminal is positive). h heatsink Examples: ID, IB, iD, iB, id, ib, Idm, ibm. I, i input j-a junction to ambient TRANSISTOR VOLTAGES j-mb junction to mounting base A voltage is indicated by the first two subscripts: the first K, k cathode identifies the terminal at which the voltage is measured and the second the reference terminal or the circuit node. L load The second subscript may be omitted when there is no M, m peak value possibility of confusion. (min) minimum Examples: VGS, vGS, vgs, Vgsm, VBE, vBE, vbe, Vbem. (max) maximum mb mounting base SUPPLY VOLTAGES OR CURRENTS O, o As first subscript: reverse (or reverse Supply voltages or supply currents are indicated by transfer), rise. As second subscript: repeating the appropriate terminal subscript. 1997 Nov 26 37, Examples: VDD, ISS, VCC; IEE. Examples: A reference terminal is indicated by a third subscript. gfs Small-signal value of the short-circuit forward transconductance in Example: VDDS, VCCE. common-source configurationDhSmall-signal value of the short-circuitEVICES WITH MORE THAN ONE TERMINAL OF THE SAME KIND fe forward current transfer ratio in If a device has more than one terminal of the same kind, common-emitter configuration the subscript is formed by the appropriate letter for the Zi = Ri + jXi Small-signal value of the input impedance. terminal, followed by a number. Hyphens may be used to avoid confusion in multiple subscripts. If more than one subscript is used, subscripts for which a choice of style is allowed, the subscripts chosen are all Examples: upper-case or all lower-case. ID2 Continuous (DC) current flowing into the second gate terminal Examples: hFE, yRE, hfe, gFS. VB2-E Continuous (DC) voltage between the FOUR-POLE MATRIX PARAMETERS terminals of second base and emitter. The first letter subscript (or double numeric subscript) MULTIPLE DEVICES indicates input, output, forward transfer or reverse transfer. For multiple unit devices, the subscripts are modified by a number preceding the letter subscript. Hyphens may be Examples: hi (or h11), ho (or h22), hf (or h21), hr (or h12). used to avoid confusion in multiple subscripts. A further subscript is used for the identification of the circuit Examples: configuration. When no confusion is possible, this further subscript may be omitted. I2B Continuous (DC) current flowing into the base terminal of the second unit Examples: hfe (or h21e), hFE (or h21E). V1D-2D Continuous (DC) voltage between the drain terminals of the first and second units. DISTINCTION BETWEEN REAL AND IMAGINARY PARTS If it is necessary to distinguish between real and imaginary ELECTRICAL PARAMETERS parts of electrical parameters, no additional subscripts are The upper-case variant of a subscript is used for the used. If basic symbols for the real and imaginary parts designation of static (DC) values. exist, these may be used. Examples: Examples: Zi = Ri + jXi, yfe = gfe + jbfe. gFS Static value of forward transconductance in If such symbols do not exist or are not suitable, the common-source configuration (DC current notation shown in the following examples is used. gain) Examples: hFE Static value of forward current transfer in common-emitter configuration (DC current Re (hib) etc. for the real part of hib gain) Im (hib) etc. for the imaginary part of hib. RDS DC value of the drain-source resistance. RE DC value of the external emitter resistance. S-PARAMETER DEFINITIONS The static value is the slope of the line from the origin to The S-parameter symbols in this section are based on the operating point on the appropriate characteristic curve, IEC publication 747 − 7. i.e. the quotient of the appropriate electrical quantities at S-parameters (return losses or reflection coefficients) of a the operating point. module can be defined as the S11 and S22 of a two-port The lower-case variant of a subscript is used for the network (see Fig.1). designation of small-signal values. 1997 Nov 26 38, In (5), a2 = 0 means output port terminated with Z0 (derived from formula (4)). a b In (6), a1 = 0 means input port terminated with Z01 2 (derived from formula (3)). S11 S22b1a2 Measurement The return losses are measured with a network analyzer D.U.T. MLB335 after calibration, where the influence of the test jig is eliminated. The necessary termination of the other port Fig.1 Two-port network with reflection coefficients with Z0 is done automatically by the network analyzer. S11 and S22. The network analyser must have a directivity of at least 40 dB to obtain an accuracy of 0.5 dB when measuring b = S × a + S × a (1) return loss figures of 20 dB. A full two-port correction1 11 1 12 2 method can be used to improve the accuracy. b2 = S21 × a1 + S22 × a2 (2) where: TAPE AND REEL PACKING 1 Tape and reel packing meets the feed requirements ofa1 = - × (V + Z × i ) = signal into port 1 (3)2 × Z101automatic pick and place equipment (packing conforms to0 IEC publication 286-2 and 286-3). Additionally, the tape is 1 an ideal shipping container. a2 = - × (V2 + Z0 × i2 ) = signal into port 22 × Z0 Packing TO-92 (SOT54) leaded types b1 = - × (V1 + Z0 × i1 ) = signal out port 1 (4)2 × Z The transistors are supplied on tape in boxes (ammopack)0 or on reels. The number per reel and per ammopack is b 12 = - × (V + Z × i ) = signal out port 2 2000. The ammopack has 80 layers of 25 transistors2 × Z2020 each. Each layer contains 25 transistors, plus one empty position in order to fold the layer correctly.The ammopack From (1) and (2) formulae for the return losses can be is accessible from both sides, enabling the user to choose derived: between ‘normal’ (see Fig.3) and ‘reverse’ tape. ‘Normal’ b1 is indicated by a plus sign (+) on the ammopack andS11 = - aa 2 = 0 (5) ‘reverse’ by a minus sign (−). In the European version, the leading pin is the emitter. b S22 = - 2- a1 = 0 (6)a2 1997 Nov 26 39, handbook, full pagewidthPTA1 (p) ∆ h ∆ h
AH2 H1 W2 H0 L W0 W1
WMEA940 F1 F2 D0 t1FtFig.2 TO-92 (SOT54) transistors on tape. 1997 Nov 26 40, Table 1 Tape specification TO-92 (SOT54) leaded types
SPECIFICATIONSSYMBOL DIMENSION REMARKS MIN. NOM. MAX. TOL. UNIT A1 body width 4 − 4.8 − mm A body height 4.8 − 5.2 − mm T body thickness 3.5 − 3.9 − mm P pitch of component − 12.7 − ±1 mm P0 feed hole pitch − 12.7 − ±0.3 mm cumulative pitch error − − − ±0.1 note 1 P2 feed hole centre to component − 6.35 − ±0.4 mm to be measured at bottom centre of clinch F distance between outer leads − 5.08 − +0.6/−0.2 mm ∆h component alignment − 0 1 − mm at top of body W tape width − 18 − ±0.5 mm W0 hold-down tape width − 6 − ±0.2 mm W1 hole position − 9 − +0.7/−0.5 mm W2 hold-down tape position − 0.5 − ±0.2 mm H0 lead wire clinch height − 16.5 − ±0.5 mm H1 component height − − 23.25 − mm L length of snipped leads − − 11 − mm D0 feed hole diameter − 4 − ±0.2 mm t total tape thickness − − 1.2 − mm t1 = 0.3 to 0.6 F1, F2 lead-to-lead distance − − − +0.4/−0.2 mm H2 clinch height − − − − mm (p) pull-out force 6 − − − N Note 1. Measured over 20 devices. Dropouts Tape splicing A maximum of 0.5% of the specified number of transistors Splice the carrier tape on the back and/or front so that the in each packing may be missing. Up to 3 consecutive feed hole pitch (P0) is maintained (see Figs 2 and 4). components may be missing provided the gap is followed by 6 consecutive components. 1997 Nov 26 41, handbook, full pagewidth 55 max O 15 min O 380 A min (1) (1) packing label 55 max max (1) A A - A MEA473 direction of unreeling Dimensions in mm. Fig.3 Dimensions of reel and box. 1997 Nov 26 42, handbook, full pagewidth MEA941 30 mm min
Fig.4 Joining tape with splicing patch.handbook, full pagewidth 0.40 min 4.2 max 1.7 5.2 max 12.7 min 1.4 0.48 1 0.40 4.8 max 2.54 2 0.66 (1) 2.0 max MBC014 - 10.56 Dimensions in mm. (1) Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities.
Fig.5 TO-92 (SOT54) with straight leads.1997 Nov 26 43, handbook, full pagewidth 0.40 min 4.2 max 1.7 5.2 max 12.7 min 1.4 1 0.48 0.40 4.8 2 max 2.54 0.66 0.56 (1) 2.5 max MBC015 - 1 Dimensions in mm. (1) Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. Fig.6 TO-92 (SOT54) with delta pinning. Packing types Table 2 Packing quantities per reel 12NC TAPE WIDTH REEL SIZE QUANTITY PER PACKAGE (note 1) (mm) (mm) REEL ends with: SOT23 8 180 3000 ...215 330 10000 ...235 SOT143 8 180 3000 ...215 SOT143R 330 10000 ...235 SOT143 (cross emitter pinning) 180 3000 ...215 SOT143R (cross emitter pinning) 330 10000 ...235 SOT323 8 180 3000 ...115 330 10000 ...135 SOT343 8 180 3000 ...115 SOT353 8 180 3000 ...115 SOT363 8 180 3000 ...115 SOT89 12 180 3000 ...115 SOT223 12 180 3000 ...115 Notes 1. 12NC is the Philips twelve-digit ordering code. 1997 Nov 26 44, handbook, full pagewidthKK0A0T1 SOT23 SOT143R/343R SOT143/343GθW1 B1 B0 D1
W F ED0 P P2δδP(1)0 TMBE547 - 1 direction of unreeling For dimensions see Table 3. (1) Tolerance over any 10 pitches: ±0.2 mm. Fig.7 Specification for 8 mm tape (SOT23, SOT143, SOT143R, SOT343 and SOT343R). handbook, full pagewidthKK0A0T1 SOT323 SOT353 SOT363GθW1 B1 B0 D1
W F ED0 P P2δδP(1)0 TMSA450 direction of unreeling For dimensions see Table 3. (1) Tolerance over any 10 pitches: ±0.2 mm. Fig.8 Specification for 8 mm tape (SOT323, SOT353 and SOT363). 1997 Nov 26 45,
KK0 A0 θ T1
GW1 B1 B0 D1
W F ED0 P P2δδP(1) MEA466 - 10 T direction of unreeling For dimensions see Table 3. (1) Tolerance over any 10 pitches: ±0.2 mm. Fig.9 Specification for 12 mm tape (SOT89). 1997 Nov 26 46,
KK0 A0 T1
Gθ W1 B1 B0 D1
W F ED0 P P2δδP(1) MEA467 - 10 T direction of unreeling For dimensions see Table 3. (1) Tolerance over any 10 pitches: ±0.2 mm. Fig.10 Specification for 12 mm tape (SOT223). 1997 Nov 26 47, Table 3 SMD packages: tape dimensions (in mm) DIMENSION CARRIER TAPE
TOLERANCE(Figs 7 to 12) 8 mm 12 mm 16 mm Overall dimensions W 8.0 12.0 16.0 ±0.2 K <1.5 <2.4 <2.2 − G >0.75 >0.75 >1.65 − Sprocket holes; note 1 D0 1.5 1.5 1.5 +0.1/−0 E 1.75 1.75 1.75 ±0.1 P0 4.0 4.0 4.0 ±0.1 Relative placement compartment P2 2.0 2.0 2.0 ±0.1 F 3.5 5.5 7.5 ±0.05 Compartment A0 B Compartment dimensions depend on package size. Maximum clearance between0 device and compartment is 0.3 mm; the minimum clearance ensures that the device B1 is not totally restrained within the compartment. K0 D1 >1.0 >1.5 >1.5 − P 4.0 8.0 12.0 ±0.1 θ <15° <15° − − Cover tape; note 2 W1 <5.4 <9.5 − − T1 <0.1 <0.1 − − Carrier tape W 8.0 12.0 16.0 ±0.2 T <0.2 <0.2 <0.4 − δ <0.3 <0.3 <0.3 − Notes 1. Tolerance over any 10 pitches ±0.2 mm. 2. The cover tape shall not overlap the tape or sprocket holes. 1997 Nov 26 48, t handbook, full pagewidth
W O U ECBAtrailer leader MEA942 fixing tape For dimensions see Table 2. Fig.11 Reel specification. Table 4 Reel dimensions (in mm) DIMENSION CARRIER TAPE
TOLERANCE(see Fig.11) 8 mm 12 mm 16 mm Flange A 180(1) − 286 or 330 180 or 330 180 or 330 ±0.5 t 1.5 1.5 1.5 +0.5/−0.1 W 8.4 12.4 18 18.0+0.2 Hub B 62 62 62 ±1.5 C 12.75 12.75 12.75 +0.15/−0.2 Key slotE222±0.2U444±0.5 O 120° 120° 120° − Note 1. Large reel diameter depends on individual package (286 or 350). 1997 Nov 26 49, handbook, full pagewidth direction of unreeling top viewebebcbccbecceccbeeeeebeebMEA471 SOT23 SOT323 SOT23 SOT143 SOT143R SOT143 SOT143R (reversed) (cross (cross emitter emitter pinning) pinning) Fig.12 Orientation of components: SOT23, SOT143, SOT143R and SOT323 (8 mm tape). handbook, full pagewidth direction of unreeling top viewebebcecMEA472 SOT223 SOT89 Fig.13 Orientation of components: SOT223 and SOT89 (12 mm tape). 1997 Nov 26 50, MOUNTING AND SOLDERING Screen printing Mounting methods This is the best high-volume production method of solder paste application. An emulsion-coated, fine mesh screen There are two basic forms of electronic component with apertures etched in the emulsion to coincide with the construction, those with leads for through-hole mounting surfaces to be soldered is placed over the substrate. A and microminiature types for surface mounting (SMD). squeegee is passed across the screen to force solder Through-hole mounting gives a very rugged construction paste through the apertures and on to the substrate. and uses well established soldering methods. Surface The layer thickness of screened solder paste is usually mounting has the advantages of high packing density plus between 150 and 200 µm. high-speed automated assembly. Surface mounting techniques are complex and this chapter gives only a Stencilling simplified overview of the subject. In this method a stencil with etched holes to pass the paste Although many electronic components are available as is used. The thickness of the stencil determines the surface mounting types, some are not and this often leads amount of amount of solder paste that is deposited on the to the use of through-hole as well as surface mounting substrate. This method is also suited to high-volume work. components on one substrate (a mixed print). The mix of components affects the soldering methods that can be applied. A substrate having SMDs mounted on one or both Dispensing sides but no through-hole components is likely to be A computer-controlled pressure syringe dispenses small suitable for reflow or wave soldering. A double sided mixed doses of paste to where it is required. This method is print that has through-hole components and some SMDs mainly suitable for small production runs and laboratory on one side and densely packed SMDs on the other use. normally undergoes a sequential combination of reflow and wave soldering. When the mixed print has only Pin transfer through-hole components on one side and all SMDs on the other, wave soldering is usually applied. A pin picks up a droplet of solder paste from a reservoir and transfers it to the surface of the substrate or Reflow soldering component. A multi-pin arrangement with pins positioned to match the substrate is possible and this speeds up the SOLDER PASTE process time. Most reflow soldering techniques utilize a paste that is a mixture of flux and solder. The solder paste is applied to REFLOW TECHNIQUES the substrate before the components are placed. It is of Thermal conduction sufficient viscosity to hold the components in place and, therefore, an application of adhesive is not required. The prepared substrates are carried on a conveyor belt, Drying of the solder paste by preheating increases the first through a preheating stage and then through a viscosity and prevents any tendency for the components to soldering stage. Heat is transferred to the substrate by become displaced during the soldering process. conduction through the belt. Figure 14 shows a theoretical Preheating also minimizes thermal shock and drives off time/temperature relationship for thermal conduction flux solvents. reflow soldering. This method is particularly suited to thick film substrates and is often combined with infrared heating. 1997 Nov 26 51, Infrared An infrared oven has several heating elements giving a broad spectrum of infrared radiation, normally above and below a closed loop belt system. There are separate zones for preheating, soldering and cooling. Dwell time in the soldering zone is kept as short as possible to prevent MBC938 damage to components and substrate. A typical heating. 250T profile is shown in Fig.15. This reflow method is often ( o C) applied in double-sided prints. 200 Vapour phase A substrate is immersed in the vapours of a suitable boiling liquid. The vapours transfer latent heat of condensation to 50 the substrate and solder reflow takes place. Temperature is controlled precisely by the boiling point of the liquid ata0050 100 150 200 given pressure. Some systems employ two vapour zones, t (s) one above the other. An elevator tray, suspended from a hoist mechanism passes the substrate vertically through the first vapour zone into the secondary soldering zone and then hoists it out of the vapour to be cooled. A theoretical time/temperature relationship for this method Fig.14 Theoretical time/temperature curve for a is shown in Fig.16. typical thermal conductive reflow cycle. MBC937 MBC939 250 215 20 o / s
T T( o C) 75 o / s ( o C) free air cooling00preheating soldering max. 45 s cooling8 s 20 s 10 - 30 s 45 s entering phase soldering zone removal phase 60 % of time in 150 % of time in soldering zone soldering zone Fig.15 Typical temperature profile of an infrared Fig.16 Theoretical time/temperature curve oven operating at a belt speed of relationship for dual vapour reflow 0.41 mm/min. soldering. 1997 Nov 26 52, Wave soldering suited to low volume production. An advantage is the flexibility provided by computer programmability. This soldering technique is not recommended for SOT89.
FLUXINGADHESIVE APPLICATION The quality of the soldered connections between Since there are no connecting wires to retain them, components and substrate is critical for circuit leadless and short-leaded components are held in place performance and reliability. Flux promotes solderability of with adhesive for wave soldering. A spot of adhesive is the connecting surfaces and is chosen for the following carefully placed between each SMD and the substrate. attributes: The adhesive is then heat-cured to withstand the forces of the soldering process, during which the components are • Removal of surface oxides fully immersed in solder. There are several methods of • Prevention of reoxidation adhesive application. • Transference of heat from source to joint area Pin transfer method • Residue that is non-corrosive or, if residue is corrosive, should be easy to clean away after soldering A pin is used to transfer a droplet of adhesive from a • Ability to improve wettability (readiness of a metal reservoir to a precise position on the surface where it is surface to form an alloy at its interface with the solder) required. The size of the droplet depends on pin diameter, to ensure strong joints with low electrical resistance depth to which the pin is dipped in the reservoir, rheology of the adhesive, and the temperature of adhesive and • Suitability for the desired method of flux application. surrounds. The pin can be part of a pin array (bed of nails) In wave soldering, liquified flux is usually applied as a that corresponds exactly with the required adhesive foam, a spray or in a wave. positions on the substrate. With this method, adhesive can be applied to the whole of one side of a substrate in one Foam operation and is therefore suitable for high-volume production and can be used with pre-loaded mixed prints. Flux foam is made by forcing low-pressure, water-free clean air through an aerator immersed in liquid flux. Fine Alternatively, pins can be used to transfer adhesive to the bubbles of flux are directed onto the substrate/component components before they are placed on the substrate. This surfaces where they burst and form a thin, even layer. The adds flexibility to production runs where variations in flux also penetrates any plated-through holes. The flux has layout must be accommodated. to be chosen for its foaming capabilities. Screen printing method Spray A fine mesh screen is coated with emulsion except in the Several methods of spray fluxing exist, the most common positions where the adhesive is required to pass. The involves a mesh drum rotating in liquid flux. Air is blown screen is placed on the substrate and a squeegee passing into the drum which, when passing through the fine mesh, across it forces adhesive through the uncoated parts of the directs a spray of flux onto the underside of the substrate. screen. The amount of adhesive printed-through depends The amount of flux deposited is controllable by the speed on the size of the uncoated screen areas, the thickness of of the substrate passing through the spray, the speed of the screen coating, the rheology of the adhesive and rotation of the drum and the density of the flux. various machine parameters. With this method, the substrate must be flat and pre-loaded mixed prints cannot Wave be accommodated. A wave fluxer creates a double flowing wave of liquid flux Pressure syringe method which adheres to the surface as the substrate passes through. Wave height control is essential and a soft A computer-controlled syringe dispenses adhesive from wipe-off brush is usually incorporated to remove excess an enclosed reservoir by means of pulses of compressed flux from the substrate. air. The adhesive dot size depends on the size of the syringe nozzle, the duration and pressure of the pulsed air and the viscosity of the adhesive. This method is most 1997 Nov 26 53, PRE-HEATING surfaces. A smooth laminar solder wave is required to avoid bridging and a high pressure wave is needed to Pre-heating of the substrate and components is performed completely cover the areas that are difficult to wet. These immediately before soldering. This reduces thermal shock conflicting demands are difficult to attain in a single wave as the substrate enters the soldering process, causes the but dual wave techniques go a long way in overcoming the flux to become more viscous and accelerates the chemical problem. action of the flux and so speeds up the soldering action. In a dual wave machine (see Fig.18), the substrate first SOLDERING comes into contact with a turbulent wave which has a high vertical velocity. This ensures good solder contact with Wave soldering is usually the best method to use when both edges of the components and prevents joints from high throughput rates are required. The single wave being missed. The second smooth laminar wave soldering principle (see Fig.17) is the most straight forward completes the formation of the solder fillet, removes method and can be used on simple substrates with excess solder and prevents bridging. Figure 19 indicates two-terminal SMD components. More complex substrates the time/temperature relationship measured at the with increased circuit density and closer spacing of soldering site in dual wave soldering. conductors can pose the problems of nonwetting (dry joints) and solder bridging. Bridging can occur across the New methods of wave soldering are developing closely spaced leads of multi-leaded devices as well as continually. For example, the Omega System is a single across adjacent leads on neighbouring components. wave agitated by pulses, which combines the functions of Nonwetting is usually caused by components with plastic smoothness and turbulence. In another, a lambda wave bodies. The plastic is not wetted by solder and creates a injects air bubbles in the final part of the wave. A further depression in the solder wave, which is augmented by innovation is the hollow jet wave in which the solder wave surface tension. This can cause a shadow behind the flows in the opposite direction to the substrate. component and prevent solder from reaching the joint board travel handbook, halfpage board travel SMDs MBC935 MBC934 solder solder Fig.17 Single wave soldering principle. Fig.18 Dual wave soldering principle. 1997 Nov 26 54, Footprint design The footprint design of a component for surface mounting is influenced by many factors: • Features of the component, its dimensions and handbook, halfpage MBC936 300 tolerances
T( o C) • Circuit board manufacturing processes 250 • Desired component density • Minimum spacing between components 1 K/s 200 K/s • Circuit tracks under the component 150 • Component orientation (if wave soldering) • Positional accuracy of solder resist to solder lands 100 • Positional accuracy of solder paste to solder lands (if reflow soldering) 50 • Component placement accuracy • Soldering process parameters 0 50 100 time (s) 150 • Solder joint reliability parameters. Fig.19 Typical time-temperature curve measured at the soldering site. 1997 Nov 26 55,
SOT23 FOOTPRINTS2.90 handbook, full pagewidth 2.50 solder lands solder resist 0.85213.00 1.30 2.70 occupied area 0.85 3 solder paste 0.60 (3x) 0.50 (3x) 0.60 (3x) 1.00 3.30 MSA439 Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.20 Reflow soldering footprint for SOT23; typical dimensions.3.40 handbook, full pagewidth 1.20 (2x) solder lands solder resist occupied area214.60 4.00 1.20 preferred transport direction during soldering 2.80 4.50 MSA427 Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.21 Wave soldering footprint for SOT23; typical dimensions.1997 Nov 26 56,
SOT143 FOOTPRINTS3.25 handbook, full pagewidth 0.60 (3x) 0.50 (3x) solder lands 0.60 (4x) solder resist432.70 occupied area1.30 3.00 12 solder paste MSA441 0.90 1.00 2.50 Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.22 Reflow soldering footprint for SOT143; typical dimensions.4.45 handbook, full pagewidth 1.20 (3x) solder lands solder resist43occupied area 1.15 4.00 4.6012preferred transport direction during soldering MSA422 1.00 3.40 Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.23 Wave soldering footprint for SOT143; typical dimensions.1997 Nov 26 57,
SOT89 FOOTPRINTS4.75 handbook, full pagewidth 2.25 2.00 1.90 1.20 solder lands 0.85 0.20 solder resist occupied area1.70 1.20 solder paste 4.60 4.85 0.501.20 1.20 1.00231(3x) MSA442 0.60 (3x)0.70 (3x) 3.70 3.95 Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.24 Reflow soldering footprint for SOT89; typical dimensions.1997 Nov 26 58, 6.60 handbook, full pagewidth 2.40 solder lands solder resist 3.50 occupied area 3 7.60 0.50 1.20 3.00 transport direction during soldering MSA423 1.50 0.70 5.30 We do not recommend SOT89 for wave soldering, SOT223 is preferred. Dimensions in mm. Placement accuracy: ±0.25 mm. Fig.25 Wave soldering footprint for SOT89: typical dimensions. 1997 Nov 26 59, SOT223 FOOTPRINTS 7.00 handbook, full pagewidth 3.85 3.60 3.50 0.30 1.20 solder lands (4x) solder resist 4 occupied area solder paste 7.40 3.90 4.80 7.651231.20 (3x) MSA443 1.30 (3x) 5.90 6.15 Dimensions in mm. Placement accuracy: ±0.25 mm. Fig.26 Reflow soldering footprint for SOT223; typical dimensions. 1997 Nov 26 60, 8.90 handbook, full pagewidth 6.70 solder lands solder resist occupied area 4.30 8.10 8.70123preferred transport direction during soldering 1.90 (2x) 1.10 MSA424 7.30 Dimensions in mm. Placement accuracy: ±0.25 mm. Fig.27 Wave soldering footprint for SOT223; typical dimensions. 1997 Nov 26 61,
SOT323 FOOTPRINTS2.65 handbook, full pagewidth 0.75 1.325 1.30 solder lands solder resist 0.60 3 0.50 2.35 0.85 (3x) (3x) 1.90 occupied area solder paste 0.55 (3x) 2.40 MSA429 Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.28 Reflow soldering footprint for SOT323; typical dimensions.4.60 handbook, full pagewidth 4.00 1.15 solder lands solder resist occupied area 3.65 2.10 2.70 1 0.90(2x) MSA419 preferred transport direction during soldering Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.29 Wave soldering footprint for SOT323; typical dimensions.1997 Nov 26 62,
SOT343 FOOTPRINTS2.50 handbook, full pagewidth 0.60 (3x) 0.50 (3x) 0.55 solder lands (4x) 34 solder resist 1.30 2.40 2.70 occupied area12solder paste MSA430 0.70 0.80 1.90 Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.30 Reflow soldering footprint for SOT343; typical dimensions.handbook, full pagewidth 3.65 0.90 (3x) solder lands432.30 solder resist occupied area 1.15 4.00 12 3.00 transport direction during soldering 1.00 MSA421 2.70 Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.31 Wave soldering footprint for SOT343; typical dimensions.1997 Nov 26 63,
SOT353 FOOTPRINTS2.65 handbook, full pagewidth 2.40 1.30 solder lands15solder resist 2.10 0.90 0.40 0.50(4x) 2.35 occupied area34solder paste 0.55 MSA431 (5x) Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.32 Reflow soldering footprint for SOT353; typical dimensions.A + 1.00 2.30 handbook, full pagewidth A 2.00 1.15 solder lands solder resist 5 occupied area 4.00 1.00 0.30 0.90 2.70 4.60 transport direction during soldering A = 2.00 for carrier soldering A = 2.50 for carrier less soldering MSA425 Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.33 Wave soldering footprint for SOT353; typical dimensions.1997 Nov 26 64,
SOT363 FOOTPRINTS2.65 handbook, full pagewidth 2.40 1.30 solder lands 0.4016(2x) solder resist252.35 0.50 0.90 2.10 (4x) occupied area34solder paste 0.55 MSA432 (6x) Dimensions in mm. Placement accuracy: ±0.25 mm.
Fig.34 Reflow soldering footprint for SOT363; typical dimensions.A + 2.00 handbook, full pagewidth
A1.15 solder lands solder resist16occupied area254.60 4.00 0.30 1.00 transport direction during soldering34A= 4.00 for carrier soldering A = 5.00 for carrier less soldering MSA426 Dimensions in mm. Placement accuracy:
Fig.35 Wave soldering footprint for SOT363; typical dimensions.1997 Nov 26 65, Hand soldering microminiature components The peak temperature of the die depends on the ability of the package and its mounting to transfer heat from this die It is possible to solder microminiature components with a to ambient environment (see Fig.38). The basic light-weight hand-held soldering iron, but this method has relationship between die temperature (junction obvious drawbacks and should be restricted to laboratory temperature) and power dissipation is: use and/or incidental repairs on production circuits: • Hand-soldering is time-consuming and therefore Tj max = Tamb + Pd max × [Rth j-s + Rth s-a] expensive • The component cannot be positioned accurately and the connecting tags may come into contact with the substrate and damage it • There is a risk of breaking the substrate and internal connections in the component could be damaged handbook, halfpage die collector leador anode lead • The component package could be damaged by the iron. THERMAL CONSIDERATIONS solder pointMBG387 printed circuit board Thermal resistance Circuit performance and long-term reliability are affected by the temperature of the transistor die. Normally, both are Fig.36 Assembly of SMD package and PCB. improved by keeping the die temperature (junction temperature) low. Electrical power dissipated in any semiconductor device is a source of heat. This increases the temperature of the die above a certain reference point. The most relevant reference point of the semiconductor device is the soldering point (i.e. the point on the printed-circuit board handbook, halfpage where the collector lead is soldered to a heat-draining point see Figs 36 and 37). solder point The temperature rise as a function of dissipation power, ‘thermal resistance’, is given in the data sheets as the MBG386 printed circuit board Rth j-s value. The heat is drained by conduction via the leadframe, soldering point and substrate (printed-circuit board) to ambient. The amount of radiated and convected heat is negligible in comparison to the conducted heat. Fig.37 Assembly of SOD80-like package and PCB. The elements of thermal resistance are defined as follows: Pd Power dissipation (W) Thermal resistance from junction to soldering point Rth j-s Thermal resistance from junction to [Rth(j-s)] soldering point (K/W) In the example for Tj max, only Tamb and Rth s-a can be Rth s-a Thermal resistance from soldering point to varied by the user. The construction of the printed-circuit ambient (K/W) board (PCB) and the ambient condition (as there is air Rth j-a Thermal resistance from junction to ambient flow) affect Rth s-a. The device power dissipation can be (K/W) controlled to a limited extent, under recommended usage. T Junction temperature of the die (°C) The supply voltage and circuit loading dictate a fixedj power maximum. The Rth j-s value is essentially Ts Soldering point temperature (°C) independent of external mounting method and cooling air, Tamb Ambient temperature (°C) but is sensitive to the materials used in the package T Temperature of the reference point (°C) construction, the die mount and the die area, all of whichref are fixed. 1997 Nov 26 66, Values of Tj max and Rth j-s, or Rth j-c are given in the device data sheets. For applications where Ts is known, Tj can be calculated from: MBC389 T = T + P 4jsd× Rth j-s 10
ESRThermal resistance from soldering point to ambient (mΩ) [Rth s-a] 500 MHz There is a limiting value for the soldering point 10 temperature. For the normal tin alloy (Sn-Pb 60% - 40%): MHz 100 Ts max = 110 °C. The value of Ts can be calculated from: MHz Ts = Ta + Pd × Rth s-a. The thermal resistance from soldering point to ambient 50 depends on the shape and material of the tracks on a MHz printed-circuit board as illustrated in Fig.39. Summary of the SMD envelopes 10 1 10 102 103 C (pF) These thermal considerations are valid for the following envelopes: (1) Single-sided, unplated. SOD80, SOD87, SOD106, SOD110, SOD123, SOD323, (2) Single-sided, plated. SC59, SC70, SOT23, SOT89, SOT123, SOT143, (3) Double-sided, unplated. SOT223, SOT323, SOT343, SOT346 and SO8 (4) Double-sided, plated. (SOT96-1). Fig.39 Thermal resistance (Rth s-a) as a function of pad area on different configurations of FR4 epoxy fibre-glass circuit board. Temperature calculation under pulsed conditions In pulsed power conditions, the peak temperature of the die depends on the pulse time and duty factor as well handbook, halfpage junction as the ability of the package and its mounting to disperse heat. Rth j−s When power is applied in repetitive square-wave pulses soldering with a certain duty factor (δ), the variation in junction point R th j−a temperature has a sawtooth characteristic. R The average steady-state junction temperature is:th s−a Tj(av) = Tref + δ × Pd × Rth j-ref ambient MBG385 The peak junction temperature, however, is the most relevant to performance reliability. This can be calculated by heating and cooling step functions that result in heating and cooling curves shifted in time as shown in Fig.40. The peak value of Tj is reached at the end of a power pulse and the minimum value immediately before the next Fig.38 Representation of thermal resistance paths power pulse. The thermal ripple is the difference between of a device mounted on a substrate or Tj(peak) and Tj(min). printed board. Calculation of Tj(peak) after n pulses: 1997 Nov 26 67, a=n – 1 Tj(peak) = Tref + Pd × ∑ [ Zth (at – w) – Zth (at) ] a=0 where a is an integer number. haPndd b(oWok), halfpage Pd (av) w d−w/t t ∆Tj-ref ∆T2 = Pd x Zth (t+w) haPndbo(wok), halfpage P (K)d d ∆T3 = Pd x Zth (w) ∆T 1 = dxPxRd−w/t (av) d th j-refwt∆T(av)2 = d x Pd x Zth (2t+w) power Pd ∆T4 = Pd x Zth (+) + Pd
P0dT(oj C)Pd Tj (peak) − Pd Tj (av) thermal-ripple ∆Tj Tj (min) MBG390 ∆ ∆T1Tj ∆T2 ∆ Tj (peak) = Ta + ∆T1 + ∆T2 + ∆T3 + ∆T4 − ∆T5 − ∆T6 − ∆T7T3 Ta ∆T4 Fig.41 Two-pulse approximation method of finding ∆T5 peak steady-state junction temperature Tj Tj (peak) [Tj(peak)]. thermal-ripple Tj (min) MBG391 The junction temperature at the end of the second pulse is: Tj(peak) = Tref + Pd × [δ × Rth(j-ref) + (1 − δ) × Zth(t+w) + Zth(w) − Zth(t)] The junction temperature immediately before the second Fig.40 Heating effect of three identical power pulses power pulse is: after thermal stabilization. Tj(min) = Tref + Pd × [δ × Rth(j-ref) + (1 − δ) × Zth(t) + Zth(w) − Zth(t−w)] Approximation method of finding Tj(peak) The thermal ripple is: With this method it is assumed that the average load is immediately followed by two square power pulses as ∆Tj = Tj(peak) − Tj(min) shown in Fig.41. This two-pulse approximation method is ∆Tj = Pd × [δ × (Zth(t) − Zth(t+w) − 2 × Zth(t) + Zth(w) + Zth(t−w)] accurate enough for finding Tj(peak). Reducing calculation time To be able to point out the junction peak temperature at a certain pulse time and duty cycle, a graph similar to that shown in Fig.42 is included in relevant data sheets. In this example, the curves have been derived using the formula 1997 Nov 26 68, Tj(peak) = Tref + Pd × [δ × Rth(j-ref) + (1 − δ) × Zth(t+w) Soldering point temperature provides a better reference + Zth(w) − Zth(t)], with typical values inserted. point than ambient temperature as this is subject to many uncontrolled variables. Therefore, the thermal resistance The pulse width along the X-axis meets a particular duty from junction to soldering point [Rth(j-s)] is becoming a morecycle curve, indicating the Zth value in K/W along the relevant measurement path. Y-axis. Tj(peak) = Pd(peak) × Zth(j-s) + Pd(av) × Rth(s-a) + Ta (°C) 3 MBG388 handbook1, 0full pagewidth Zth j-a (K/W) δ = 0.75 0.5 102 0.3 0.2 0.1tPδp= 0.05Ttpt
T10−6 10−5 10−4 10−3 10−2 10−1 tp (s) 1 Fig.42 Direct reading of thermal impedance from junction to soldering point for calculation of junction temperature at pulsed power condition. 1997 Nov 26 69, ELECTROSTATIC CHARGES RECEIPT AND STORAGE Electrostatic charges can exist in many things; for Our devices are packed for dispatch in example, man-made-fibre clothing, moving machinery, antistatic/conductive containers, usually boxes, tubes or objects with air blowing across them, plastic storage bins, blister tape. The fact that the contents are sensitive to sheets of paper stored in plastic envelopes, paper from electrostatic discharge is shown by warning labels on both electrostatic copying machines, and people. The charges primary and secondary packing. are caused by friction between two surfaces, at least one The devices should be kept in their original packing whilst of which is non-conductive. The magnitude and polarity of in storage. If a bulk container is partially unpacked, the the charges depend on the different affinities for electrons unpacking should be performed at a protected work of the two materials rubbing together, the friction force and station. Any devices that are stored temporarily should be the humidity of the surrounding air. packed in conductive or antistatic packing or carriers. Electrostatic discharge is the transfer of an electrostatic charge between bodies at different potentials and occurs with direct contact or when induced by an electrostatic ASSEMBLY field. Our devices can be damaged if the following The devices must be removed from their protective precautions are not taken. packing with earthed component pincers or short-circuit clips. Short-circuit clips must remain in place during mounting, soldering and cleansing/drying processes. Do WORK STATION not remove more devices from the storage packing than Figure 43 shows a working area suitable for safely are needed at any one time. Production/assembly handling electrostatic sensitive devices. It has a work documents should state that the product contains bench, the surface of which is conductive or covered by an electrostatic sensitive devices and that special precautions antistatic sheet. Typical resistivity for the bench surface is need to be taken. between 1 and 500 kΩ per cm2. The floor should also be All tools used during assembly, including soldering tools covered with antistatic material. and solder baths, must be earthed. All hand tools should The following precautions should be observed: be of conductive or antistatic material and, where possible, • Persons at a work bench should be earthed via a wrist should not be insulated. strap and a resistor Measuring and testing of completed circuit boards must be • All mains-powered electrical equipment should be done at a protected work station. Place the soldered side connected via an earth leakage switch of the circuit board on conductive or antistatic foam and • Equipment cases should be earthed remove the short-circuit clips. Remove the circuit board from the foam, holding the board only at the edges. Make • Relative humidity should be maintained between sure the circuit board does not touch the conductive 50 and 65% surface of the work bench. After testing, replace the circuit • An ionizer should be used to neutralize objects with board on the conductive foam to await packing. immobile static charges. Assembled circuit boards should be handled in the same way as unmounted devices. They should also carry warning labels and be packed in conductive or antistatic packing. 1997 Nov 26 70, (1) handbook, full pagewidth (2) (2) (2) (3) (6) (7) (8) (5) (4) MLB049 (9) (1) Earthing rail. (2) Resistor (500 kΩ ± 10%, 0.5 W). (3) Ionizer. (4) Work bench. (5) Chair. (6) Wrist strap. (7) Electrical equipment. (8) Conductive surface/antistatic sheet. (9) Antistatic floor. Fig.43 Protected work station. 1997 Nov 26 71]
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“That holy dream- that holy dream, While all the world were chiding, Hath cheered me as a lovely beam A lonely spirit guiding.” A Dream Edgar Allan Poe Born out of years of thoughts and despair, the music of A Dream of Poe built itself around the main carachter of this play – Miguel Santos – shaping
Page 1 of 34 DICTIONARY / DICTIONAR A 1. ABSENCE makes the heart grow fonder. Ochii care se vãd rar se iubesc. Mai rãrut, mai drãgut. 2. ABSENCE sharpens love, presence strengthens it. Celor ce duc mai mult dorul, le pare mai dulce odorul. 3. Long ABSENT, soon forgotten. Prin depãrtare dragostea se
Design, layout and cover art by Adele Daniele / becauseilikeyou.com.au Original cover concept by Sia Furler Cover photograph by Chrissie Francis / rocksnaps.com Felt photographs by Chrissie Francis and Adele Daniele All other photographs by Liz Ham, RJ Shaughnessy, Louis Park for FLUX Magazine and G