Download: Dual PLL frequency synthesizer BU2630F / BU2630FV
Communication ICs Dual PLL frequency synthesizer BU2630F / BU2630FV The BU2630F/BU2630FV are a CMOS LSI with an internal dual PLL synthesizer. VCOs for transmission and reception can be controlled independently, and the reference frequency and main counter settings can also be programmed separately. This product is designed for applications involving cordless telephones and communications equipment worldwide. Applications Cordless telephones, amateur short wave radios, industrial transceivers, VHF/UHF frequency generators, and others Features 1) Operation possible at up to 80MHz (VDD = 2.5). 3...
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Communication ICs Dual PLL frequency synthesizer BU2630F / BU2630FV
The BU2630F/BU2630FV are a CMOS LSI with an internal dual PLL synthesizer. VCOs for transmission and reception can be controlled independently, and the reference frequency and main counter settings can also be programmed separately. This product is designed for applications involving cordless telephones and communications equipment worldwide. Applications Cordless telephones, amateur short wave radios, industrial transceivers, VHF/UHF frequency generators, and others Features 1) Operation possible at up to 80MHz (VDD = 2.5). 3) 16-bit main counter. 2) Low current dissipation 4) Internal 14-bit reference frequency counter. Dual-system operation : 2.2mA (typ), VDD = 3V 5) Unlock detection possible. Single-system operation : 1.2mA (typ), VDD = 3V 6) Four output ports. (open drain) Non-operating state : 0.2mA (typ), VDD = 3V 7) Control possible using 3-wire serial input. Block diagram, Absolute maximum ratings (Ta = 25C) Recommended operating conditions (Ta = 25C) Pin descriptions, Input /output circuits, Electrical characteristics (unless otherwise noted, Ta = 25C, VDD = 3.0V, VSS = 0V), Circuit operation, Description of data (1) Programmable divider data: D0 D15 (2) Reference frequency data: R0 R13 (3) Output port control data : P-T (P-R) TON (RON) 1 : Open drain output ON (LO) 0 : Open drain output OFF (HI) (4) OFF transmission side (reception side) : Operation stopped F - T (F - R) pull-down : TPD (RPD) high-impedance, LD = OFF (5) PS Programmable device change : No. of divisions = 3 4095, (6) PL, PH, and PD pin control00: PLL operation10: Forced LO state01: Forced HI state11: Forced LO state (7) LD0, LD1, LD pin control (valid only on TX side) 0 0 : ON when unlocked (LO) 0 1 : Air pulse output10: Forced ON state (LO) 1 1 : Forced OFF state (HI) (8) Input (00) to test T0 and T1. Application example, Electrical characteristic curves External dimensions (Units: mm)]15
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