Download: E AB-60 APPLICATION BRIEF 2/4/8-Mbit SmartVoltage Boot Block Flash Memory Family Overview

E

AB-60

APPLICATION BRIEF

2/4/8-Mbit SmartVoltage

Boot Block Flash Memory Family Overview

December 1996 Order Number: 292154-004, Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel retains the right to make changes to specifications and product descriptions at any time, without notice. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. COPYRIGHT © INTEL CORPORATION 1996 Third-party brands and names are the property of their respective owners. Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from: Intel Corporation P.O. Box 7641 Mt. Prospect, IL 60056-7641 or call 1-800-879-4683 CG-041493,

E AB-60 CONTENTS PAGE

1.0 INTRODUCTION ...5 2.0 BOOT BLOCK ARCHITECTURE...5 3.0 PINOUT COMPATIBLE DENSITY UPGRADES ...5 4.0 VOLTAGE OPTIONS ...5 4.1 Smart 5 Flash ...5 4.2 SmartVoltage (SVT) Flash ...5 4.3 Standard Flash ...5 5.0 UPGRADE NOTES ...6 5.1 Transitioning SmartVoltage Designs to Smart 5 Flash ...6 5.2 Upgrading from Standard Flash to SVT ...6 5.3 WP# Pin on 8-Mbit 44-PSOP ...6 6.0 PACKAGE PINOUTS...7 7.0 MEMORY MAPS ...9 8.0 PRODUCT OFFERINGS ...11 APPENDIX A: Ordering Information ...13 APPENDIX B: Additional Information...14

FIGURES

Figure 1. The SmartVoltage Technology Boot Block Line Features a Pinout-Compatible Upgrade Path...5 Figure 2. The 40-Lead TSOP Offers the Smallest Form Factor for Space-Constrained Applications ...7 Figure 3. The 44-Lead PSOP Offers a Convenient Upgrade from JEDEC ROM Standards...7 Figure 4. The 48-Lead TSOP Offers the Smallest Form Factor for x16 Operation ...8 Figure 5. The 56-Lead TSOP Offers Compatibility between 2 and 4 Mbits ...8 Figure 6. Byte-Wide x8-Mode Memory Maps (Top Boot) ...9 Figure 7. Byte-Wide x8-Mode Memory Maps (Bottom Boot) ...9 Figure 8. Word-Wide x16-Mode Memory Maps (Top Boot) ...10 Figure 9. Word-Wide x16-Mode Memory Maps (Bottom Boot) ...10 Figure 10. Decoding the Product Names ...13

TABLES

Table 1. Write Protection Truth Table ...6 Smart 5 Boot Block Products ...11 SmartVoltage Boot Block Products ...11 Standard Flash Boot Block Products ...12, AB-60 E REVISION HISTORY Number Description -001 Original Version -002 Text updated. DU and WP# pin usage clarified. Note and “B” suffixes added to Figure 2. SmartVoltage Boot Block Products table: Speeds added to 28F800 and 28F008, 2.7V products added. Figure 10 updated. -003 28F002BC, 28F200CE, 28F002BE, 28F400CE, 28F002BE line items added to products table. -004 Smart 5 migration information added to text; products (28F200B5, 28F400B5, 28F800B5) added to product table. A17 on Pin 3 of 44-PSOP diagram changed to NC. (correction),

E AB-60

1.0 INTRODUCTION 4.0 VOLTAGE OPTIONS This document includes a feature overview, pinouts, Intel offers flash memories in a number of different and memory maps for Intel’s SmartVoltage boot block voltage options to provide the right features at the right family, including 2/4/8-Mbit densities and Smart 5 price. The following sections discuss the various flash option. These products offer Intel’s boot block options. architecture with the SmartVoltage technology (SVT) outlined below. Follow the design steps in Section 5.0 to upgrade 12V VPP designs to SVT. 4.1 Smart 5 Flash Smart 5, designated by a B5 product name suffix, is a 2.0 BOOT BLOCK ARCHITECTURE new voltage option for Intel SmartVoltage flash memories. Products supporting the Smart 5 option can Intel’s boot block architecture products offer the read with VCC at 5V and program/erase with VPP at familiar features that optimize it for updateable either 5V or 12V. firmware storage. These features include: Smart 5 products allow: • Hardware-lockable boot block for secure kernel 1. Simple single-supply designs with both VCC andcode storage VPP at 5V • Separate, switchable VPP pin allowing absolute 2. Fast factory programming with V write protection PP = 12V, which can save 20 cents/Mbit over single-supply flash • Parameter blocks for parameter storage • Main blocks for modular code updates, facilitating Smart 5 products save you money with simplified updateable firmware designs, lower manufacturing costs, and the lowest cost SmartVoltage flash components. • x8 or x16 configurable I/O operation • RP# pin for reset and write protection 4.2 SmartVoltage (SVT) Flash • PSOP and TSOP packages SmartVoltage technology, designated by a BV, CV, BE, or CE product name suffix, offers voltage 3.0 PINOUT COMPATIBLE DENSITY flexibility: UPGRADES • VCC = 2.7V–3.6V, 3.3V ± 0.3V or 5V ± 10% with Intel provides pinout-compatible upgrades for the enhanced circuits to optimize low-voltage 2-Mbit, 4-Mbit, and 8-Mbit densities. The pinouts in performance when low power consumption is Figures 2, 3, and 4 illustrate these compatible upgrade critical. paths. Upgrade issues are discussed further in • Program/erase operation with VPP = 5V for con-Section 5. venient in-system writes or VPP = 12V for fast production programming. 4.3 Standard Flash 2M 4M 8M Products that require VPP = 12V to program and erase are designated by BX, BL, or BC product name suffixes. 2154-01 Figure 1. The SmartVoltage Technology Boot Block Line Features a Pinout-Compatible Upgrade Path, AB-60 E 5.0 UPGRADE NOTES 3. Connect WP# (DU “Don’t Use” on BX/BL products) to VCC, GND, or a control signal. This This section discusses any issues that may be required pin should not be left floating. The DU pin on when upgrading from one product line to another. BX/BL products can be driven to a logic-level in order to provide upgrade compatibility. The WP# 5.1 Migrating SmartVoltage pin replaces the DU pin and is used in conjunction Designs to Smart 5 Flash with the VPP and RP# pins to control write protection of the boot block. If a design does not require low-voltage operation, consider migrating to Intel’s Smart 5 boot block flash. Although most of the significant timing specifications Smart 5 boot block products offer the same architecture are the same, some differences in power and timing as SmartVoltage boot block parts, but support only 5V specs must be accounted for. Full details on this topic V . Designs requiring low-voltage operation should can be found in the product datasheet and theCC consider an SmartVoltage or Smart 3 product instead. application note, AP-611 Boot Block Compatibility: 2/4-Mbit BX/BL with 2/4/8-Mbit BV. Other than the VCC voltage support, some differences need to be accommodated. Full details on this topic can be found in the product datasheet and the application 5.3 WP# Pin on 8-Mbit 44-PSOP note, AB-65 Migrating SmartVoltage Boot Block Designs to Smart 5. The 8-Mbit in the 44-PSOP package does not have a WP# pin because no other pins were available for the 1. On-the-fly word-byte mode switching is no longer 8-Mbit upgrade address. Thus, in this density-package supported. Word-byte mode must be configured at combination only, VHH (12V) on RP# is required to power-up and remain stable during device unlock the boot block and unlocking with a logic-level signal is not possible. If this unlocking functionality is operation. required, and 12V is not available in-system, please 2. Write operations are no longer specified as WE#- or consider using the 48-TSOP package, which has a WP# CE#-controlled in favor of a simpler “unified” write pin and can be unlocked with a logic-level signal. All method, which is compatible with either of the old other density-package combinations have WP# pins. methods. Table 1 details the control of the locking functions 3. Resets when a program or erase operation is in using VPP, RP#, and WP#. In the case of the 8-Mbit progress are handled differently. Smart 5 boot block 44-PSOP, which does not have WP#, the last row of products require a period of time, tPLRH, to shut the truth table would not be available. down the in-progress operation, and are unavailable for reads or writes during that time. An RC delay Table 1. Write Protection Truth Table circuit between the system CPU and the system VPP RP# WP# Write Protectionreset signal may be needed to allow the flash to Provided reset properly before CPU initialization begins. VILXXAll Blocks Locked ≥ VVXAll Blocks Locked 5.2 Upgrading from PPLK IL (Reset) Standard Flash to SVT ≥ VPPLK VHH X All Blocks Unlocked If you have designs using standard 12V VPP boot block ≥ VVVBoot Block Locked products, you must adhere to the following design PPLK IH IL steps to ensure you can upgrade to SVT: ≥ VPPLK VIH VIH All Blocks Unlocked 1. If 5V program/erase is desired, allow for connecting VPP to 5V and disconnecting V PP from 12V. 2. If switching VPP on and off for write protection, switch to GND instead of VCC.,

E AB-60

6.0 PACKAGE PINOUTS 28F008B 28F004B 28F004B 28F008B A16 A16 A16 1 40 A17 A17 A17 A15 A15 A15 2 39 GND GND GND A14 A14 A14 3 38 NC NC NC A13 A13 A13 4 37 NC NC A19 A12 A12 A12 5 36 A10 A10 A10 A11 A11 A11 6 35 DQ7 DQ7 DQ7 A9 A9 A9 7 28F002B 34 DQ6 DQ6 DQ6 A8 A8 A8 8 Boot Block 33 DQ5 DQ5 DQ5 WE# WE# WE# 9 40-Lead TSOP 32 DQ4 DQ4 DQ4 RP# RP# RP# 10VVV11 10 mm x 20 mm 31 VCC VCC VCC PP PP PP 30 VCC VCC VCC WP# WP# WP# 12 29 NC NC NC A18 A18 NC 13 TOP VIEW 28 DQ3 DQ3 DQ3 A7 A7 A7 14 27 DQ2 DQ2 DQ2 A6 A6 A6 15 26 DQ1 DQ1 DQ1 A5 A5 A5 16 25 DQ0 DQ0 DQ0 A4 A4 A4 17 24 OE# OE# OE# A3 A3 A3 18 23 GND GND GND A2 A2 A2 19 22 CE# CE# CE# A1 A1 A1 20 21 A0 A0 A0 2154-02 NOTE: 1. The 28F008B pinout shown is for the 8-Mbit boot block, and not the 28F008SA FlashFile™ memory. 2. This package not available for Smart 5 (-B5 suffix) products. Consider the 48-TSOP package instead.

Figure 2. The 40-Lead TSOP Offers the Smallest Form Factor for Space-Constrained Applications

28F800 28F400 28F400 28F800 VPP VPP VPP 1 44 RP# RP# RP# A 18 WP# WP# 2 43 WE# WE# WE# A 17 A 17 NC 3 42A8A8A8A7A7A7441A9A9A9A6A6A6540 A 10 A 10 A 10A5A5A5639 A 11 A APA28F200 11 11A4A4A47AAABoot Block 38 12 12 12A3A3A3844-Lead PSOP 37 A 13 A 13 A 13A2A2A290.525" x 1.110" 36 A 14 A 14 A 14A1A1A110 35 A 15 A 15 A 15A0A0A011 TOP VIEW 34 A 16 A 16 A 16 CE# CE# CE# 12 33 BYTE# BYTE# BYTE# GND GND GND 13 32 GND GND GND OE# OE# OE# 14 31 DQ15 /A-1 DQ15 /A-1 DQ15 /A-1 DQ 0 DQ 0 DQ 0 15 30 DQ 7 DQ 7 DQ 7 DQ 8 DQ 8 DQ 8 16 29 DQ 14 DQ 14 DQ 14 DQ 1 DQ 1 DQ 1 17 28 DQ 6 DQ 6 DQ 6 DQ 9 DQ 9 DQ 9 18 27 DQ 13 DQ 13 DQ 13 DQ 2 DQ 2 DQ 2 19 26 DQ 5 DQ 5 DQ 5 DQ 20 2510 DQ 10 DQ 10 DQ 12 DQ 12 DQ 12 DQ 3 DQ 3 DQ 3 21 24 DQ 4 DQ 4 DQ 4 DQ 11 DQ 11 DQ 11 22 23 VCC VCC VCC 2154-03 NOTE: Pin 2 is WP# on 2- and 4-Mbit devices but A18 on the 8-Mbit because no other pins were available for the high order address. Thus, the 8-Mbit in 44-PSOP cannot unlock the boot block without RP# = VHH(12V). See datasheet for details. To allow upgrades to 8-Mbit from 2/4-Mbit in this package, design pin 2 to control WP# at 2/4-Mbit level and A18 at 8-Mbit density.

Figure 3. The 44-Lead PSOP Offers a Convenient Upgrade from JEDEC ROM Standards

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AB-60 E

28F800 28F400 28F400 28F800 A15 A15 A15 1 48 A16 A16 A16 A14 A14 A14 2 47 BYTE# BYTE# BYTE# A13 A13 A13 3 46 GND GND GND A12 A12 A12 4 45 DQ15 /A-1 DQ15/A-1 DQ15 /A-1A11 A11 A11 5 44 DQ DQ DQ A10 A10A77710 6 43 DQ14 DQ14 DQ14 A9 A9 A9 7 42 DQ6 DQAAA6DQ6888841 DQ13 DQ13 DQ13 NC NC NC 9 40 DQ5 DQ5 DQ5 NC NC NC 10 28F200 39 DQ12 DQ12 DQ12 WE# WE# WE# 11 Boot Block 38 DQ4 DQ4 DQ4 RP# RP# RP# 12 48-Lead TSOP 37VVVVV36 CC CC

VCC

PP PP PP 13 12 mm x 20 mm DQ11 DQ11 DQ WP# WP# WP# 14 35

DQ

34 3 DQ3 DQ3 NC NC NC 15 A NC TOP VIEW DQ DQ DQ 18 NC 16 33 10 10 10 DQ2 DQ2 DQ2 A17 A17 NC 17 32 DQ9 DQ9 DQ9 A7 A7 A7 18 31 DQ1 DQ1 DQ1 A6 A6 A6 19 30 DQ8 DQ8 DQ8 A5 A5 A5 20 29 DQ0 DQ0 DQ0 A4 A4 A4 21 28 OE# OE# OE# A 223 A3A327 GND GND GND A2 A2A223 26 CE# CE# CE# A1AA24 25A0A0A0 2154-04

Figure 4. The 48-Lead TSOP Offers the Smallest Form Factor for x16 Operation

28F400 28F400 NC NC 1 56 NC NC NC NC 2 55 A16 A16 A15 A15 3 54 BYTE# BYTE# A14 A14 4 53 GND GND A13 A13 5 52 DQ15/A-1 DQ15/A-1 A12 A12 6 51 DQAA7DQ7 11 11 7 50 DQ14 DQ14 A10 A10 8 49 DQ6 DQ6 A9 A9 9 48 DQ13 DQ13 A8 A8 10 47 DQ5 DQ5 NC NC 11 28F200 46 DQ12 DQ12 NC NC 12 Boot Block 45 DQ4 DQ4 WE# WE# 13 56-Lead TSOP 44 VCC VCC RP# RP# 14 14 mm x 20 mm 43 VCC VCC NC NC 15 42 DQ11 DQ11 NC NC 16 TOP VIEW 41 DQ3 DQ3 VPP VPP 17 40 DQ10 DQ10 WP# WP# 18 39 DQ2 DQ2 NC NC 19 38 DQ9 DQ9 A17 NC 20 37 DQ DQ A7A11721 36 DQ8 DQA 86 A6 22 35 DQAA0DQ05523 34 OE# OE#A4 A4 24AA33 GND GND3 3 25 32 CE# CE#A2A226 31AAA0A01127 30 NC NC NC NC 28 29 NC NC 2154-05 NOTE: This package is not available for any 8-Mbit or Smart 5 (-B5 suffix) device. Consider the 48-TSOP package instead.

Figure 5. The 56-Lead TSOP Offers Compatibility between 2 and 4 Mbits

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E AB-60

7.0 MEMORY MAPS 28F002-T 28F004-T 28F800-T 3FFFFH 7FFFFH FFFFFH 16-Kbyte BOOT BLOCK 16-Kbyte BOOT BLOCK 16-Kbyte BOOT BLOCK 3C000H 7C000H FC000H 3BFFFH FBFFFH8-Kbyte PARAMETER BLOCK 7BFFFH 8-Kbyte PARAMETER BLOCK 8-Kbyte PARAMETER BLOCK 3A000H 7A000H FA000H 39FFFH F9FFFH8-Kbyte PARAMETER BLOCK 79FFFH 8-Kbyte PARAMETER BLOCK 8-Kbyte PARAMETER BLOCK 38000H 78000H F8000H 37FFFH 77FFFH F7FFFH 96-Kbyte MAIN BLOCK 96-Kbyte MAIN BLOCK 96-Kbyte MAIN BLOCK 20000H 60000H E0000H 1FFFFH 5FFFFH DFFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 00000H 40000H C0000H 3FFFFH BFFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 20000H A0000H 1FFFFH 9FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 00000H 80000H 7FFFFH 60000H 5FFFFH 40000H 3FFFFH 20000H 1FFFFH 00000H 2154-06

NOTE: These memory maps apply to the 28F002/004/008-T components, or the 28F200/400/800-T components

in byte-wide (x8) configuration.

Figure 6. Byte-Wide x8-Mode Memory Maps (Top Boot) FFFFFH

E0000H

DFFFFH

C0000H

BFFFFH

A0000H 9FFFFH 80000H 7FFFFH 7FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 60000H 60000H 5FFFFH 5FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 40000H 40000H 3FFFFH 3FFFFH 3FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 20000H 20000H 20000H 1FFFFH 1FFFFH 1FFFFH 96-Kbyte MAIN BLOCK 96-Kbyte MAIN BLOCK 96-Kbyte MAIN BLOCK 08000H 08000H 08000H 07FFFH 8-Kbyte PARAMETER BLOCK 07FFFH 8-Kbyte PARAMETER BLOCK 07FFFH 8-Kbyte PARAMETER BLOCK 06000H 06000H 06000H 05FFFH 8-Kbyte PARAMETER BLOCK 05FFFH 8-Kbyte PARAMETER BLOCK 05FFFH 8-Kbyte PARAMETER BLOCK 04000H 04000H 04000H 03FFFH 03FFFH 03FFFH 16-Kbyte BOOT BLOCK 16-Kbyte BOOT BLOCK 16-Kbyte BOOT BLOCK 00000H 00000H 00000H 28F002-B 28F004-B 28F800-B 2154-07

NOTE: These memory maps apply to the 28F002/004/008-B components, or the 28F200/400/800-B components

in byte-wide (x8) configuration.

Figure 7. Byte-Wide x8-Mode Memory Maps (Bottom Boot)

,

AB-60 E

28F200-T 28F400-T 28F800-T 1FFFFH 3FFFFH 7FFFFH 16-Kbyte BOOT BLOCK 16-Kbyte BOOT BLOCK 16-Kbyte BOOT BLOCK 1E000H 3E000H 7E000H 1DFFFH 7DFFFH8-Kbyte PARAMETER BLOCK 3DFFFH 8-Kbyte PARAMETER BLOCK 8-Kbyte PARAMETER BLOCK 1D000H 3D000H 7D000H 1CFFFH 3CFFFH 7CFFFH8-Kbyte PARAMETER BLOCK 8-Kbyte PARAMETER BLOCK 8-Kbyte PARAMETER BLOCK 1C000H 3C000H 7C000H 1BFFFH 3BFFFH 7BFFFH 96-Kbyte MAIN BLOCK 96-Kbyte MAIN BLOCK 96-Kbyte MAIN BLOCK 10000H 30000H 70000H 0FFFFH 2FFFFH 6FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 00000H 20000H 60000H 1FFFFH 5FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 10000H 50000H 0FFFFH 4FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 00000H 40000H 3FFFFH 30000H 2FFFFH 20000H 1FFFFH 10000H 0FFFFH 00000H 2154-08 (Word addresses shown)

NOTE: These memory maps apply to the denoted 28F200/400/800-T components in word-wide (x16) mode. Figure 8. Word-Wide x16-Mode Memory Maps (Top Boot)

7FFFFH 70000H 6FFFFH 60000H 5FFFFH 50000H 4FFFFH 40000H 3FFFFH 3FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 30000H 30000H 2FFFFH 2FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 20000H 20000H 1FFFFH 1FFFFH 1FFFFH 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 128-Kbyte MAIN BLOCK 10000H 10000H 10000H 0FFFFH 0FFFFH 0FFFFH 96-Kbyte MAIN BLOCK 96-Kbyte MAIN BLOCK 96-Kbyte MAIN BLOCK 04000H 04000H 04000H 03FFFH 8-Kbyte PARAMETER BLOCK 03FFFH 8-Kbyte PARAMETER BLOCK 03FFFH 8-Kbyte PARAMETER BLOCK 03000H 03000H 03000H 02FFFH 8-Kbyte PARAMETER BLOCK 02FFFH 8-Kbyte PARAMETER BLOCK 02FFFH 8-Kbyte PARAMETER BLOCK 02000H 02000H 02000H 01FFFH 01FFFH 01FFFH 16-Kbyte BOOT BLOCK 16-Kbyte BOOT BLOCK 16-Kbyte BOOT BLOCK 00000H 00000H 00000H 28F200-B 28F400-B 28F800-B 2154-09 (Word addresses shown)

NOTE: These memory maps apply to the denoted 28F200/400/800-B components in word-wide (x16) mode. Figure 9. Word-Wide x16-Mode Memory Maps (Bottom Boot)

,

E AB-60

8.0 PRODUCT OFFERINGS Smart 5 Boot Block Products Product Density x Org. Pkg. Speed (ns) Extended (VCC = 5V) Temp. 28F200B5 2 Mb, 256Kx8/128Kx16 44-PSOP, 48-TSOP 60, 80 √ 28F400B5 4 Mb, 512Kx8/256Kx16 44-PSOP, 48-TSOP 60, 80 √ 28F800B5 8 Mb, 1024Kx8/512Kx16 44-PSOP, 48-TSOP 70, 90 √ SmartVoltage Boot Block Products Product Density x Org. Pkg Speed (ns) Speed (ns) Speed (ns) Extended (VCC = 5V) (VCC = 3.3V) (VCC = 2.7V) Temp. 28F200BV 2 Mb, 256Kx8/128Kx16 44, 56 60, 80, 120 110, 150, 180 √ 28F200CV 2 Mb, 256Kx8/128Kx16 48 60, 80, 120 110, 150, 180 √ 28F002BV 2 Mb, 256Kx8 40 60, 80, 120 110, 150, 180 √ 28F200CV 2 Mb, 256Kx8/128Kx16 48 60, 80, 120 110, 150, 180 √ 28F200CE 2 Mb, 256Kx8/128Kx16 48 90 120 √ 28F002BE 2 Mb, 256Kx8 40 90 120 √ 28F400BV 4 Mb, 512Kx8/256Kx16 44, 56 60, 80, 120 110, 150, 180 √ 28F400CV 4 Mb, 512Kx8/256Kx16 48 60, 80, 120 110, 150, 180 √ 28F004BV 4 Mb, 512Kx8 40 60, 80, 120 110, 150, 180 √ 28F400CE 4 Mb, 512Kx8/256Kx16 48 90 120 √ 28F004BE 4 Mb, 512Kx8 40 90 120 √ 28F800BV 8 Mb, 1024Kx8/512Kx16 44 70,120 120,150 √ 28F800CV 8 Mb, 1024Kx8/512Kx16 48 70,120 120,150 √ 28F008BV 8 Mb, 1024Kx8 40 70,120 120,150 √ 28F800CE 8 Mb, 1024Kx8/512Kx16 48 90 120 √ 28F008BE 8 Mb, 1024Kx8/512Kx16 40 90 120 √ NOTE: BE/CE products operate over the VCC ranges 2.7V–3.6V and 5V ±10%.,

AB-60 E

Standard Flash Boot Block Products Product Density x Org. Pkg. Speed (ns) Speed (ns) Extended (VCC = 5V) (VCC = 3.3V) Temperature 28F001BX 1 Mb, 128Kx8 P, N, E 70, 90, 120, 150 √ 28F200BX 2 Mb, 256Kx8/128Kx16 PA, E 60, 80, 120 √ 28F002BX 2 Mb, 256Kx8 E 60, 80, 120 √ 28F200BL 2 Mb, 256Kx8/128Kx16 PA, E (1) 150 √(2) 28F002BL 2 Mb, 256Kx8 E (1) 150 √(2) 28F002BC 2 Mb, 256Kx8(3) PA, E 80, 120 28F400BX 4 Mb, 512Kx8/256Kx16 PA, E 60, 80, 120 √ 28F004BX 4 Mb, 512Kx8 E 60, 80, 120 √ 28F400BL 4 Mb, 512Kx8/256Kx16 PA, E (1) 150 √(2) 28F004BL 4 Mb, 512Kx8 E (1) 150 √(2) NOTES: 1. The BL products also operate at 5V VCC for programmer compatibility. 2. –20°C – +70°C operating range for Read; –0°C – +70°C for program and erase. 3. 28F002BC available in -T (top boot) version only.,

E AB-60 APPENDIX A ORDERING INFORMATION E28F400B5 - T 6 0

Operating Temperature Access Speed (ns) T = Extended Temp BE/CE: VCC = 2.7V Blank = Commercial Temp BV/CV, B5: VCC = 5V T = Top Boot Package B = Bottom Boot E = TSOP PA = 44-Lead PSOP Voltage Options (VPP/VCC) TB = Ext. Temp 44-Lead PSOP 5 = (5 or 12 / 5) V = (5 or 12 / 3.3 or 5) E = (5 or 12 / 2.7 or 5) Product line designator X, C = (12 / 5) for all Intel Flash products L = (12 / 3.3 or 5) Architecture Density / Organization B = Boot Block 00X = x8-only (X = 1, 2, 4, 8) C = Compact 48-Lead TSOP X00 = x8/x16 Selectable (X = 2, 4, 8) Boot Block 0539_23 Figure 10. Decoding the Product Names,

AB-60 APPENDIX B ADDITIONAL INFORMATION

Order Number Document 290599 Smart 5 Boot Block Flash Memory Family 2, 4, 8 Mbit 290531 2-Mbit (128K x 16, 256K x 8) SmartVoltage Boot Block Flash Memory FamilyDatasheet 290530 4-Mbit (256K x 16, 512K x 8) SmartVoltage Boot Block Flash Memory FamilyDatasheet 290539 8-Mbit (512K x 16, 1024K x8) SmartVoltage Boot Block Flash Memory Family Datasheet 290578 28F002BC 2-Mbit (256K x 8) Boot Block Flash Memory Datasheet 290448 2-Mbit (128K x 16, 256K x 8) Boot Block Flash Memory Family Datasheet 290449 2-Mbit (128K x 16, 256K x 8) Low-Power Boot Block Flash Memory Family Datasheet 290451 4-Mbit (256K X 16, 512K X 8) Boot Block Flash Memory Family Datasheet 290450 4-Mbit (256K X 16, 512K X 8) Boot Block Flash Memory Family Datasheet 292164 AP-611 Boot Block Compatability: 2/4 Mbit BX/BL with 2/4/8-Mbit BV 292194 AB-65 Migrating SmartVoltage Boot Block Designs to Smart 5 NOTE: 1. Please call the Intel Literature Center at (800) 548-4725 to request Intel documentation. International customers should contact their local Intel or distribution sales office. 2. Visit Intel’s World Wide Web home page at http://www.Intel.com for technical documentation and tools.]

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